发明授权
- 专利标题: Method and a system for calibrating a phase nonlinearity of a digital-to-time converter
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申请号: US16618427申请日: 2017-07-17
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公开(公告)号: US11245403B2公开(公告)日: 2022-02-08
- 发明人: Sebastian Sievert , Ofir Degani , Ashoke Ravi
- 申请人: INTEL IP CORPORATION
- 申请人地址: US CA Santa Clara
- 专利权人: INTEL IP CORPORATION
- 当前专利权人: INTEL IP CORPORATION
- 当前专利权人地址: US CA Santa Clara
- 代理机构: 2SPL Patent Attorneys PartG mbB
- 代理商 Yong Beom Hwang
- 国际申请: PCT/US2017/042306 WO 20170717
- 国际公布: WO2019/017864 WO 20190124
- 主分类号: H03M1/10
- IPC分类号: H03M1/10 ; H03L7/085 ; G04F10/00
摘要:
A method for calibrating a phase nonlinearity of a digital-to-time converter is provided. The method includes generating, based on a control word, a reference signal using a phase-locked loop. A frequency of the reference signal is equal to a frequency of an output signal of the digital-to-time converter. Further, the method includes measuring a temporal order of a transition of the output signal from a first signal level to a second signal level, and a transition of the reference signal from the first signal level to the second signal level. The method additionally includes adjusting a first entry of a look-up table based on the measured temporal order.
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