- 专利标题: Silicon wafer manufacturing method
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申请号: US16618899申请日: 2018-06-06
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公开(公告)号: US10910328B2公开(公告)日: 2021-02-02
- 发明人: Bong-Gyun Ko , Toshiaki Ono
- 申请人: SUMCO CORPORATION
- 申请人地址: JP Tokyo
- 专利权人: SUMCO CORPORATION
- 当前专利权人: SUMCO CORPORATION
- 当前专利权人地址: JP Tokyo
- 代理机构: Greenblum & Bernstein, P.L.C.
- 优先权: JP2017-134916 20170710
- 国际申请: PCT/JP2018/021720 WO 20180606
- 国际公布: WO2019/012866 WO 20190117
- 主分类号: H01L23/00
- IPC分类号: H01L23/00 ; H01L51/00 ; H01L21/02 ; H01L23/14 ; H01L21/304 ; H01L23/492
摘要:
Provided is a silicon wafer manufacturing method capable of reducing the warpage of the wafer occurring during a device process and allowing the subsequent processes, which have been suffered from problems due to severe warping of the wafer, to be carried out without problems and its manufacturing method. A silicon wafer manufacturing method according to the present invention is provided with calculating a target thickness of the silicon wafer required for ensuring a warpage reduction amount of a silicon wafer warped during a device process from a relationship between an amount of warpage of a silicon wafer and a thickness thereof occurring due to application of the same film stress to a plurality of silicon wafers having mutually different thicknesses; and processing a silicon single crystal ingot to thereby manufacture silicon wafers having the target thickness.
公开/授权文献
- US20200091089A1 SILICON WAFER MANUFACTURING METHOD 公开/授权日:2020-03-19
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