- 专利标题: Method of selectively depositing a capping layer structure on a semiconductor device structure
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申请号: US15815483申请日: 2017-11-16
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公开(公告)号: US10910262B2公开(公告)日: 2021-02-02
- 发明人: Aurélie Kuroda , Akiko Kobayashi , Dai Ishikawa
- 申请人: ASM IP Holding B.V.
- 申请人地址: NL Almere
- 专利权人: ASM IP Holding B.V.
- 当前专利权人: ASM IP Holding B.V.
- 当前专利权人地址: NL Almere
- 代理机构: Snell & Wilmer L.L.P.
- 主分类号: H01L21/00
- IPC分类号: H01L21/00 ; H01L21/768 ; H01L23/532 ; H01L21/285
摘要:
A method of selectively depositing a capping layer structure on a semiconductor device structure is disclosure. The method may include; providing a partially fabricated semiconductor device structure comprising a surface including a metallic interconnect material, a metallic barrier material, and a dielectric material. The method may also include; selectively depositing a first metallic capping layer over the metallic barrier material and over the metallic interconnect material relative to the dielectric material; and selectively depositing a second metallic capping layer over the first metallic capping layer relative to the dielectric material. Semiconductor device structures including a capping layer structure are also disclosed.
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