- 专利标题： Stacked vertical transistor erasable programmable read-only memory and programmable inverter devices
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申请号： US16359070申请日： 2019-03-20
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公开(公告)号： US10896912B2公开(公告)日： 2021-01-19
- 发明人: Alexander Reznicek , Karthik Balakrishnan , Tak Ning , Bahman Hekmatshoartabari
- 申请人： International Business Machines Corporation
- 申请人地址： US NY Armonk
- 专利权人： International Business Machines Corporation
- 当前专利权人： International Business Machines Corporation
- 当前专利权人地址： US NY Armonk
- 代理机构： Ryan, Mason & Lewis, LLP
- 代理商 Robert Sullivan
- 主分类号： H01L27/11541
- IPC分类号： H01L27/11541 ; H01L29/788 ; H01L21/8238 ; H01L21/285 ; H01L29/66 ; H01L27/092 ; H01L29/08 ; H01L29/423 ; H01L29/45 ; H01L29/78 ; H01L21/28
摘要：
A method for manufacturing a semiconductor device includes forming a first vertical transistor on a semiconductor substrate, and forming a second vertical transistor stacked on the first vertical transistor. In the method, a silicide layer is formed on a first drain region of the first vertical transistor and on a second drain region of the second vertical transistor. The silicide layer electrically connects the first and second drain regions to each other.
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