- 专利标题： Interconnect structure and method of manufacturing the same
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申请号： US15723099申请日： 2017-10-02
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公开(公告)号： US10785865B2公开(公告)日： 2020-09-22
- 发明人: Jiun-Yi Wu , Chien-Hsun Lee , Chewn-Pu Jou , Fu-Lung Hsueh
- 申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- 申请人地址： TW Hsinchu
- 专利权人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- 当前专利权人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- 当前专利权人地址： TW Hsinchu
- 代理机构： Maschoff Brennan
- 主分类号： H05K1/02
- IPC分类号： H05K1/02 ; H01L21/48 ; H01L23/498 ; H01L23/552 ; H05K1/11 ; H05K3/00 ; H05K3/40 ; H05K3/42 ; H01L21/768
摘要：
A method for manufacturing an interconnect structure is provided. The method includes the following steps. An opening is through a substrate. A low-k dielectric block is formed in the opening. At least one first via is formed through the low-k dielectric block. A first conductor is formed in the first via.
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