Invention Grant
- Patent Title: Techniques for an inductor at a second level interface
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Application No.: US16012371Application Date: 2018-06-19
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Publication No.: US10777514B2Publication Date: 2020-09-15
- Inventor: Cheng Xu , Yikang Deng , Kyu Oh Lee , Ji Yong Park , Srinivas Pietambaram , Ying Wang , Chong Zhang , Rui Zhang , Junnan Zhao
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwegman Lundberg & Woessner, P.A.
- Main IPC: H01L23/64
- IPC: H01L23/64 ; H01L23/522 ; H01L23/528 ; H01F27/24 ; H01L27/04 ; H01F27/28 ; H01L21/822

Abstract:
Techniques are provided for an inductor at a second level interface between a first substrate and a second substrate. In an example, the inductor can include a winding and a core disposed inside the winding. The winding can include first conductive traces of a first substrate, second conductive traces of a second non-semiconductor substrate, and a plurality of connectors configured to connect the first substrate with the second substrate. Each connector of the plurality of connectors can be located between a trace of the first conductive traces and a corresponding trace of the second conductive traces.
Public/Granted literature
- US20190385959A1 TECHNIQUES FOR AN INDUCTOR AT A SECOND LEVEL INTERFACE Public/Granted day:2019-12-19
Information query
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