Invention Grant
- Patent Title: Semiconductor interconnect structure having graphene-capped metal interconnects
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Application No.: US16227592Application Date: 2018-12-20
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Publication No.: US10651279B2Publication Date: 2020-05-12
- Inventor: Shin-Yi Yang , Ching-Fu Yeh , Ming-Han Lee , Shau-Lin Shue
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Sterne, Kessler, Goldstein & Fox P.L.L.C.
- Main IPC: H01L29/16
- IPC: H01L29/16 ; H01L23/522 ; H01L21/768 ; H01L23/532

Abstract:
The present disclosure relates to a semiconductor device and a manufacturing method, and more particularly to a semiconductor interconnect structure incorporating a graphed barrier layer. The present disclosure provides a method of forming a graphed barrier layer by thermally annealing amorphous carbon layers on metal catalyst surfaces. The thickness of the graphed barrier layers can be selected by varying the thickness of the amorphous carbon layer.
Public/Granted literature
- US20190131408A1 Semiconductor Interconnect Structure Having Graphene-Capped Metal Interconnects Public/Granted day:2019-05-02
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