Invention Grant
- Patent Title: Method of fabricating semiconductor package
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Application No.: US15867075Application Date: 2018-01-10
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Publication No.: US10546829B2Publication Date: 2020-01-28
- Inventor: Youn Ji Min , Seokhyun Lee , Jongyoun Kim , Kyoung Lim Suk , SeokWon Lee
- Applicant: SAMSUNG ELECTRONICS CO., LTD.
- Applicant Address: KR Suwon-si, Gyeonggi-Do
- Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee Address: KR Suwon-si, Gyeonggi-Do
- Agency: F. Chau & Associates, LLC
- Priority: KR10-2017-0097251 20170731
- Main IPC: H01L23/538
- IPC: H01L23/538 ; H01L23/00 ; H01L21/56 ; H01L21/48 ; H01L21/78 ; H01L23/31 ; H01L25/10

Abstract:
A method of fabricating a semiconductor package including forming a preliminary first insulating layer including a first opening, curing the preliminary first insulating layer to form a first insulating layer, forming a preliminary second insulating layer on the first insulating layer at least partially filling the first opening. The method includes forming a second opening in the preliminary second insulating layer at least partially overlapping the first opening. A sidewall of the first opening is at least partially exposed during forming the second opening. The preliminary second insulating layer is cured to form a second insulating layer. A barrier metal layer is formed along the sidewall of the first opening and along a sidewall of the second opening. A redistribution conductive pattern is formed on the barrier metal layer. A planarization process is performed to at least partially expose the second insulating layer.
Public/Granted literature
- US20190035756A1 METHOD OF FABRICATING SEMICONDUCTOR PACKAGE Public/Granted day:2019-01-31
Information query
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