Invention Grant
- Patent Title: Thread scheduling using processing engine information
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Application No.: US15720296Application Date: 2017-09-29
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Publication No.: US10545793B2Publication Date: 2020-01-28
- Inventor: Avinash N. Ananthakrishnan , Vijay Dhanraj , Russell J. Fenger , Vivek Garg , Eugene Gorbatov , Stephen H. Gunther , Monica Gupta , Efraim Rotem , Krishnakanth V. Sistla , Guy M. Therien , Ankush Varma , Eliezer Weissmann
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Trop, Pruner & Hu, P.C.
- Main IPC: G06F9/46
- IPC: G06F9/46 ; G06F9/48 ; G06F9/30

Abstract:
In an embodiment, a processor includes a plurality of processing engines (PEs) to execute threads, and a guide unit. The guide unit is to: monitor execution characteristics of the plurality of PEs and the threads; generate a plurality of PE rankings, each PE ranking including the plurality of PEs in a particular order; and store the plurality of PE rankings in a memory to be provided to a scheduler, the scheduler to schedule the threads on the plurality of PEs using the plurality of PE rankings. Other embodiments are described and claimed.
Public/Granted literature
- US20190102221A1 THREAD SCHEDULING USING PROCESSING ENGINE INFORMATION Public/Granted day:2019-04-04
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