Invention Grant
- Patent Title: Semiconductor structure and fabrication method thereof
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Application No.: US15961827Application Date: 2018-04-24
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Publication No.: US10529719B2Publication Date: 2020-01-07
- Inventor: Po-Han Wu , Li-Wei Feng , Shih-Han Hung , Fu-Che Lee , Chien-Cheng Tsai
- Applicant: UNITED MICROELECTRONICS CORP. , Fujian Jinhua Integrated Circuit Co., Ltd.
- Applicant Address: TW Hsin-Chu CN Quanzhou, Fujian Province
- Assignee: UNITED MICROELECTRONICS CORP.,Fujian Jinhua Integrated Circuit Co., Ltd.
- Current Assignee: UNITED MICROELECTRONICS CORP.,Fujian Jinhua Integrated Circuit Co., Ltd.
- Current Assignee Address: TW Hsin-Chu CN Quanzhou, Fujian Province
- Agent Winston Hsu
- Priority: CN201810239010 20180322
- Main IPC: H01L27/108
- IPC: H01L27/108 ; H01L21/768

Abstract:
A semiconductor structure includes an active area in a substrate, a device isolation region surrounding the active area, first and second bit line structures on the substrate, a conductive diffusion region in the active area between the first and the second bit line structures, and a contact hole between the first and the second bit line structures. The contact hole partially exposes the conductive diffusion region. A buried plug layer is disposed in the contact hole and in direct contact with the conductive diffusion region. A storage node contact layer is disposed on the buried plug layer within the contact hole. The storage node contact layer has a downwardly protruding portion surrounded by the buried plug layer. The buried plug layer has a U-shaped cross-sectional profile.
Public/Granted literature
- US20190296019A1 SEMICONDUCTOR STRUCTURE AND FABRICATION METHOD THEREOF Public/Granted day:2019-09-26
Information query
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