A memory device includes control line drivers coupled to respective pairs of reference supply voltage controllers and supply voltage controllers. The control line drivers are configured to apply control signals to the reference supply voltage controllers and the supply voltage controllers. For a read operation, the reference supply voltage controllers apply a first voltage to reference voltage supply nodes of un-accessed rows of the array of memory cells and a second voltage to accessed rows. A voltage level of the first voltage is greater than a voltage level of the second voltage. For a write operation, the supply voltage controllers apply a third voltage to un-accessed rows of the array of memory cells and a fourth voltage to accessed rows. A voltage level of the third voltage is greater than a voltage level of the fourth voltage.