- 专利标题： Method for fabricating FinFET isolation structure
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申请号： US15876176申请日： 2018-01-21
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公开(公告)号： US10510893B2公开(公告)日： 2019-12-17
- 发明人: Che-Cheng Chang , Chih-Han Lin , Horng-Huei Tseng
- 申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- 申请人地址： TW Hsinchu
- 专利权人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- 当前专利权人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- 当前专利权人地址： TW Hsinchu
- 代理机构： Maschoff Brennan
- 主分类号： H01L21/8234
- IPC分类号： H01L21/8234 ; H01L29/78 ; H01L21/02 ; H01L21/3065 ; H01L21/3213 ; H01L21/762 ; H01L29/06 ; H01L29/66
摘要：
A method for forming a semiconductor device is provided. In this method, a stop layer is formed on a semiconductor substrate. A semiconductor fin is formed on the stop layer. Two cells adjacent to each other are formed on the semiconductor fin. A gate conductor is formed on a top of the semiconductor fin at a common boundary that is shared by the two cells. A gate spacer is formed to peripherally enclose the gate conductor. The gate conductor and the semiconductor fin are etched to form a gap extending from the top of the semiconductor fin to the stop layer, thereby dividing the semiconductor fin into two portions of the semiconductor fin. The gap is filled with a dielectric filler.
公开/授权文献
- US20180145169A1 METHOD FOR FABRICATING FINFET ISOLATION STRUCTURE 公开/授权日：2018-05-24
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