- 专利标题: Memory device with dynamic cache management
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申请号: US15693178申请日: 2017-08-31
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公开(公告)号: US10509722B2公开(公告)日: 2019-12-17
- 发明人: Kishore Kumar Muchherla , Peter Feeley , Ashutosh Malshe , Daniel J. Hubbard , Christopher S. Hale , Kevin R. Brandt , Sampath K. Ratnam , Yun Li , Marc S. Hamilton
- 申请人: Micron Technology, Inc.
- 申请人地址: US ID Boise
- 专利权人: Micron Technology, Inc.
- 当前专利权人: Micron Technology, Inc.
- 当前专利权人地址: US ID Boise
- 代理机构: Perkins Coie LLP
- 主分类号: G06F12/00
- IPC分类号: G06F12/00 ; G06F12/02 ; G06F12/0891 ; G06F3/06 ; G06F12/06 ; G11C11/56
摘要:
A memory system includes a memory array having a plurality of memory cells; and a controller coupled to the memory array, the controller configured to: select a garbage collection (GC) source block storing valid data, calculate a valid data measure for the GC source block for representing an amount of the valid data within the GC source block, and designate a storage mode for an available memory block based on the valid data measure, wherein the storage mode is for controlling a number of bits stored per each of the memory cells for subsequent or upcoming data writes.
公开/授权文献
- US20190065366A1 MEMORY DEVICE WITH DYNAMIC CACHE MANAGEMENT 公开/授权日:2019-02-28
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