- 专利标题： Methods of operating integrated circuit devices having volatile and nonvolatile memory portions
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申请号： US15693360申请日： 2017-08-31
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公开(公告)号： US10446747B1公开(公告)日： 2019-10-15
- 发明人: Narbeh Derhacobian , Shane Charles Hollmer
- 申请人： Adesto Technologies Corporation
- 申请人地址： US CA Santa Clara
- 专利权人： Adesto Technology Corporation
- 当前专利权人： Adesto Technology Corporation
- 当前专利权人地址： US CA Santa Clara
- 主分类号： G11C11/00
- IPC分类号： G11C11/00 ; H01L45/00 ; G11C14/00
摘要：
A method can include, by operation of a controller circuit, writing data into a volatile memory portion formed in an integrated circuit substrate of a memory device. In response to first conditions, date can be written from the volatile memory portion into a nonvolatile memory portion formed in the same integrated circuit substrate as the volatile memory portion. The nonvolatile memory portion can store the data in two terminal memory elements re-programmable between at least two different resistance states.
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