Invention Grant
- Patent Title: Delta-sigma modulator having expanded fractional input range
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Application No.: US16000698Application Date: 2018-06-05
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Publication No.: US10291239B1Publication Date: 2019-05-14
- Inventor: Zhaoyin D. Wu , Winson Lin , Parag Upadhyaya , Geoffrey Zhang , Kun-Yung Chang
- Applicant: Xilinx, Inc.
- Applicant Address: US CA San Jose
- Assignee: XILINX, INC.
- Current Assignee: XILINX, INC.
- Current Assignee Address: US CA San Jose
- Agent Robert M. Brush
- Main IPC: H03L7/08
- IPC: H03L7/08 ; H03L7/197

Abstract:
An example apparatus includes an input circuit including a first adder and a first multiplier, the first adder configured to level-shift an input signal by an amount and the first multiplier configured to multiply output of the adder by a factor. The apparatus further includes a multi-stage noise shaping (MASH) circuit having an input coupled to the first multiplier. The apparatus further includes an output circuit including a second multiplier and a second adder, the second multiplier configured to multiply output of the MASH circuit by a reciprocal of the factor and the second adder configured to level-shift output of the second multiplier by an inverse of the amount.
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