- 专利标题: Semiconductor metrology target and manufacturing method thereof
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申请号: US15692151申请日: 2017-08-31
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公开(公告)号: US10204867B1公开(公告)日: 2019-02-12
- 发明人: Long-Yi Chen , Jia-Hong Chu , Hsin-Chin Lin , Hsiang-Yu Su , Yun-Heng Tseng , Kai-Hsiung Chen , Yu-Ching Wang , Po-Chung Cheng , Kuei-Shun Chen , Chi-Kang CHang
- 申请人: Taiwan Semiconductor Manufacturing Co., Ltd.
- 申请人地址: TW Hsinchu
- 专利权人: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- 当前专利权人: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- 当前专利权人地址: TW Hsinchu
- 代理机构: McClure, Qualey & Rodack, LLP
- 主分类号: H01L23/544
- IPC分类号: H01L23/544 ; H01L21/66 ; G03F7/20
摘要:
A metrology target of a semiconductor device is provided. The metrology target includes a substrate including first and second layers. The first layer includes a first grating, a second grating, and a first dummy structure. The first dummy structure is at least formed between the first grating and the second grating. The second layer is formed over the first layer and includes a third grating and a fourth grating. The first, second, third and fourth gratings are formed based on the first spatial period. The third grating and fourth grating are placed to overlap the first grating and second grating, respectively. The first grating and the third grating are formed with a first positional offset which is along a first direction. The second grating and the fourth grating are formed with a second positional offset which is along a second direction which is opposite to the first direction.
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