A parallel information processing apparatus includes a group of switches configured to have a topology of a Latin square, and nodes connected with a switch among the group of switches. The parallel information processing apparatus also include a memory and a processor configured to designate (n×k) units of blocks in the group of switches included in a lattice structure in the topology of the Latin square; to generate information about communication protocol that includes communication directions having different slopes for m (m≤k) units of the nodes, and the number of hops set for the respective communication directions having the different slopes; and to execute communication for the m units of the nodes of the units of the block, based on the information about communication protocol, so as to execute part-to-part communication between the m units of the nodes of the respective units of the blocks.