Invention Grant
- Patent Title: Semiconductor package assembly
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Application No.: US15618210Application Date: 2017-06-09
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Publication No.: US10177125B2Publication Date: 2019-01-08
- Inventor: Tzu-Hung Lin , I-Hsuan Peng , Ching-Wen Hsiao
- Applicant: MediaTek Inc.
- Applicant Address: TW Hsin-Chu
- Assignee: MediaTek Inc.
- Current Assignee: MediaTek Inc.
- Current Assignee Address: TW Hsin-Chu
- Agency: Wolf, Greenfield & Sacks, P.C.
- Main IPC: H01L25/16
- IPC: H01L25/16 ; H01L25/10 ; H01L23/485 ; H01L23/31 ; H01L23/00 ; H01L25/065 ; H01L23/538 ; H01L23/498

Abstract:
In one implementation, a semiconductor package assembly includes a first semiconductor package having a first semiconductor die and a first redistribution layer (RDL) structure coupled to the first semiconductor die. The first redistribution layer (RDL) structure includes a first conductive trace at a first layer-level, a second conductive trace at a second layer-level, and a first inter-metal dielectric (IMD) layer and a second inter-metal dielectric (IMD) layer, which is beside the first inter-metal dielectric (IMD) layer, wherein the second inter-metal dielectric (IMD) layer is disposed between the first conductive trace and the second conductive trace, and the second inter-metal dielectric (IMD) layer is zigzag shape in a cross-sectional view.
Public/Granted literature
- US20170278832A1 SEMICONDUCTOR PACKAGE ASSEMBLY Public/Granted day:2017-09-28
Information query
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