发明授权
- 专利标题: Least significant bit dynamic element matching in a digital-to-analog converter
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申请号: US15703401申请日: 2017-09-13
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公开(公告)号: US10069505B1公开(公告)日: 2018-09-04
- 发明人: Kenneth D. Poulton , Robert Edward Jewett
- 申请人: Keysight Technologies, Inc.
- 申请人地址: US CA Santa Rosa
- 专利权人: Keysight Technologies, Inc.
- 当前专利权人: Keysight Technologies, Inc.
- 当前专利权人地址: US CA Santa Rosa
- 主分类号: H03M1/06
- IPC分类号: H03M1/06
摘要:
A circuit for digital-to-analog conversion includes a first digital-to-analog converter (DAC), a second DAC, and an output node. The first DAC provides charges from multiple first charge sources segmented into a first group for most significant bits of a digital input to the first DAC and a second group for least significant bits of the digital input. Dither is both added to the digital input to the first DAC and used as sole digital input to the second DAC. Analog output from the second DAC is subtracted from analog output of the first DAC at the output node so as to cancel the dither added to the first DAC.
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