The invention relates to a transistor with source field plates under gate runner layers. A transistor device (100) includes a field plate (133) extending from a source contact layer (132) and definingan opening (133) above a gate metal layer (123). Coplanar with the source contact layer, the field plate is positioned close to the channel region (124), which helps reduce its parasitic capacitance.Meanwhile, the opening allows a gate runner layer (104) above the field plate to access and connect to the gate metal layer, which helps reduce the resistance of the gate structure. By vertically overlapping the metal gate layer, the field plate, and the gate runner layer, the transistor device may achieve fast switching performance without incurring any size penalty.