High voltage NMOS devices with low on resistance and associated methods of making are disclosed herein. In one embodiment, a method for making N typed MOSFET devices includes forming an N-well and a P-well with twin well process, forming field oxide, forming gate comprising an oxide layer and a conducting layer, forming a P-base in the P-well, the P-base being self-aligned to the gate, side diffusing the P-base to contact the N-well, and forming N+ source pickup region and N+ drain pickup region.