US09431995B2
A resonator element includes a quartz crystal substrate having a main surface along a plane including an X-axis and a Z′-axis, and a thickness in a Y′-axis direction. The quartz crystal substrate includes a vibrating portion including a side along the X-axis, a side along the Z′-axis, and a peripheral portion having a thickness smaller than that of the vibrating portion, which is provided along an outer edge of the vibrating portion. The vibrating portion includes a first portion and a second portion having a thickness smaller than that of the first portion, which is provided on at least an outer edge on a +X side of the X-axis and an outer edge on a −X side thereof, among outer edges of the first portion. When Z is a length of the quartz crystal substrate along the Z′-axis, and t is a thickness of the first portion, 11
US09431994B2
A piezoelectric resonator including a base part, a first support part fixed to the base part, a beam part fixed to the first support part, a weight part fixed to the beam part, a drive unit provided on the beam part, and an adjusting magnet movable on a main surface of the base part. Furthermore, the weight part is formed of a magnet or a magnetic body, and the beam part extends in a direction along the main surface of the base part. With this configuration, displacement of the resonance frequency generated due to variation in a manufacturing process can be adjusted easily. Even when the resonance frequency is displaced from desired resonance frequency due to variation in the manufacturing process of a power generating element, the displacement can be easily adjusted and maximum efficiency can be obtained.
US09431984B2
An acoustic apparatus includes a signal processor configured to generate an analog audio signal based on a digital audio signal. The digital audio signal includes a first silent part and a sound part subsequent to the first silent part. The signal processor starts an operation in a period during which the first silent part is input.
US09431972B1
The present disclosure provides advantageously flexible and effective methods, circuits and systems for digital predistortion. In one embodiment, a predistortion component circuit includes multiple configurable delay line pairs and corresponding configurable look-up tables. Each configurable delay line pair includes a first delay line for delaying an input data signal to provide a delayed input and a second delay line for delaying an input magnitude signal to provide a delayed input magnitude. Each configurable look-up table receives the delayed input magnitude from, and outputs a look-up value for, an associated delay line pair of the plurality of configurable delay line pairs. Other embodiments, aspects and features are also disclosed herein.
US09431969B2
Radio frequency (RF) amplification devices are disclosed that include Doherty amplification circuits and control circuits along with methods of operating the same. In one embodiment, the Doherty amplification circuit includes a quadrature coupler having an isolation port and a tunable impedance load coupled to the isolation port and configured to provide a tunable impedance. The control circuit is configured to tune the tunable impedance of the tunable impedance load at the isolation port dynamically as a function of the RF power of the Doherty amplification circuit. In this manner, the control circuit can provide dynamic load modulation, thereby increasing the power efficiency of the Doherty amplification circuit, particularly at backed-off power levels. The load modulation provided by the control circuit also allows the Doherty amplification circuit to provide broadband amplification in various RF communication bands.
US09431968B2
A circuit is disclosed to enhance slew rate of an amplifier. An amplifier includes an output, a first input, and a second input in a differential pair configuration. A slew rate enhancer includes a first slew rate enhancer and a second slew rate enhancer. The first slew direction enhancer is configured to detect a first slew rate condition in a first direction responsive to the first input and the second input and provide additional current for a first side of the differential pair of the amplifier during the first slew rate condition. The second slew direction enhancer is configured to detect a second slew rate condition in a second direction responsive to the first input and the second input and provide additional current for a second side of the differential pair of the amplifier during the second slew rate condition.
US09431964B2
An operational amplifier comprises a first input pair, a second input pair, a switch and a first current mirror. The first input pair comprises a different type of MOS transistor from the second input pair. The switch determines which one of the first or the second input pair is functioning and the operating input pair is configured to output voltage. The switch is further connected to the first input pair and the first current mirror. The first current mirror is further connected to the second input pair, and is configured to copy a current passing through the switch to the second input pair. Therefore an increase of transconductance of the first input pair is compensated by a decrease of transconductance of the second input pair, and the operational amplifier has a substantially constant transconductance no matter which of the first input pair and the second input pair is functioning.
US09431960B2
There is provided solution testing equipment which can detect an output variation of a THz oscillation device using a THz wave (hν) by contacting a liquid or cells on an RTD oscillation device, and can reduce the size and weight thereof. The solution testing equipment includes: a THz oscillation device configured to radiate the THz wave Is; a THz detection device configured to receive the THz wave Is; and a solution as a test object disposed on the THz oscillation device, in which the solution is tested on the basis of output characteristics of the terahertz wave varying in response to a relative permittivity of the solution.
US09431956B1
An oscillator and method for generating a signal are provided. The oscillator comprises an electro-mechanical resonator and a reconfigurable oscillator driver. The reconfigurable oscillator driver starts the oscillator in single-ended mode to avoid latching and transitions the oscillator to differential mode in such a manner as to sustain oscillations therein. The reconfigurable oscillator driver comprises two back-to-back banks of inverters and an adjustable feedback resistor. In single-ended mode, one bank is disabled and the other bank is enabled. To transition to differential mode and improve the quality of the signal, the number of enabled inverters is equalized in both banks.
US09431945B2
A method of normalizing phase measurements for a motor using a normalizing phase measurements (NPM) algorithm that a processor implements to cause a motor controller coupled to stator terminals of the phases to execute forcing a set of input current or voltage vectors (set of input vectors) including repeating the forcing after rotating the rotor through a full mechanical cycle to generate resulting current or voltage samples (resulting samples) of non-normalized phase A and phase B waveforms. The magnitude of the input vectors are sufficiently small to not move the rotor. A maximum value (x_max) and a minimum value (x_min) are determined for each of the non-normalized phase A and phase B waveforms. An offset value and normalization scale factor (NSF) are determined from the max and min values. The offsets and NSFs are applied to the non-normalized phase waveforms to generate normalized phase A and phase B waveforms.
US09431943B2
The invention relates to electromechanical assemblies comprising an alternator, especially of high power, typically greater than or equal to IMW, and a converter, the alternator comprising a rotor driven in rotation, by a wind turbine for example, and more particularly to wound rotor synchronous alternators. The drive can also take place by means of a tide-driven, hydraulic or marine-current-driven generator. An alternator comprises in a manner known per se a field winding, generally at the rotor, supplied with DC current either by split rings and brushes, or by an exciter, so as to generate in an armature winding, generally at the stator, an AC voltage.
US09431933B2
Provided is an inverter apparatus capable of preventing occurrence of overcurrent in an AC motor and stably controlling driving of the AC motor. The inverter apparatus controlling the AC motor included in an electric compressor includes a shunt resistor for detecting current flowing in the AC motor, and a limit value control unit controlling a current limit value for a detected current detected at the shunt resistor. The limit value control unit determines whether the number of times the detected current becomes equal to or more than the first threshold within a first predetermined time is equal to or more than a first number of times. The limit value control unit decreases the current limit value when the number of times the detected current becomes equal to or more than the first threshold within the first predetermined time is equal to or more than the first number of times.
US09431930B2
The present disclosure relates to an emergency stop method for hybrid construction equipment and a brake control device, and more particularly, to an emergency stop method for hybrid construction equipment and a brake control device, which may confirm a failure occurrence location of the hybrid construction equipment, absorb inertial energy of the swing body using several functions for each generated failure location so as to stably stop the swing body in an emergency manner, and when the failure occurs in the hybrid construction equipment, create the brake pattern by using the swing speed or the front information, control a brake of the swing body by controlling a voltage control valve or a hydraulic valve in accordance with the created brake pattern, such that a user may smoothly stop the swing body in accordance with a desired stop speed profile.
US09431928B2
A device for generating electrical energy from mechanical motion includes a magnetostrictive generator configured to be mechanically coupled to a power conveyance path in a well bore. The power conveyance path is configured to experience an axial force change, and the magnetostrictive generator includes at least one magnetostrictive element that experiences a corresponding force change that results in a change in magnetic permeability in the at least one magnetostrictive element resulting, and is configured to experience a change in magnetic flux in a least one component that is electromagnetically coupled to at least one conductive coil, and the conductive coil is configured to generate electricity due to these magnetic flux changes.
US09431919B2
A biomedical implant is provided for simultaneously generating multiple voltages for digital and analog circuits. Two AC voltages induced from an external single AC source located externally to the biomedical implant are used as input to a multi-voltage rectifier. The multi-voltage rectifier has a rectifier circuitry for simultaneously generating: (i) both low positive and negative voltages and (ii) both high positive and negative voltages. A startup circuitry is designed to stabilize both low positive and negative voltages prior to stabilizing both high positive and negative voltages. A timing control circuitry is used to prevent reverse leakage currents from loading capacitors to input for efficiency enhancement. The biomedical implant, by virtue of the multi-voltage timing control rectifier, achieves high power transfer efficiency greater than 85%.
US09431911B2
A power controller provides a block time in response to an output current to an output load, and the block time determines a maximum switching frequency of a switching mode power supply. An exemplifying power controller has an output current estimator, a block time generator, and a pulse width modulator. The output current estimator provides a load representative signal in response to a discharge time of the inductive device and a current sense signal, wherein the current sense signal represents a current through an inductive device. The block time generator provides a block time based on the load representative signal. The pulse width modulator generates a pulse-width-modulation signal to control a power switch in response to a compensation signal, which is in response to the output voltage to the output load. The cycle time of the pulse-width-modulation signal is limited to be not less than the block time.
US09431905B2
A multiphase buck converter (10) is disclosed, comprising: —a first buck converter branch (SD1, L1) comprising a first core section (COR1), a first power section (PWR1) having a first output node (LX1), a first coil (11) having a first end connected to the first output node (LX1), the first power section (PWR1) being adapted to be controlled by the first core section (COR1) for providing to the coil (L1) a coil current (I1), the first core section (COR1) and the first power section (PWR1) being integrated in a chip (IC); —a second buck converter branch (SD2, L2) comprising a second core section (COR2), a second power section (PWR2) having a second output node (LX2), a second coil (L2) having a first end connected to the second output node (LX2), the second power section (PWR2) being adapted to be controlled by the second core section (COR2) for providing to the second coil (L2) a second coil current (I2), the second core section (COR2) and the second power section (PWR2) being integrated in said chip (IC); —a feedback loop adapted to balance said coil currents (I1,I2). The feedback loop comprises a control block (C_B) that, in order to balance said coil currents, is adapted to compare a first average voltage at the first output node (LX1) with a second average voltage at the second output node (LX2) and control the first (SD1, L1) and second branch (SD2, L2) in order to make said first and second average voltages equal to each other. The control block (C_B) is integrated in said chip (IC) and has a first input directly connected to said first output node (LX1) and a second input directly connected to said second output node (LX2). The control block (C_B) is adapted to directly obtain said first and second average voltages from the instantaneous voltages of the first (LX1) and second (LX2) output nodes.
US09431904B2
The present document relates to efficient DC/DC converters with a modular structure for providing different levels of output currents. A controller for controlling a power converter which is configured to convert electrical power at an input voltage into electrical power at an output voltage is described. The power converter comprises first and second inverter stages comprising high side switches and low side switches which are arranged in series between the input voltage and a reference voltage. The midpoints between the high side switches and the low side switches are coupled. The electrical power at the output voltage is drawn from the midpoint. The controller is configured to determine an indication of a requested level of the electrical power at the output voltage, and to activate or deactivate the second inverter stage based on the indication of the requested level of the electrical power at the output voltage.
US09431893B1
A power factor correction (PFC) circuit includes an adaptive multiplier feedback control circuit to enhance stability of the PFC circuit for high input voltage and low input power (i.e., low input current) conditions. The adaptive multiplier feedback control circuit controls a voltage provided to a multiplier voltage input of a controller of the PFC circuit. The controller determines control loop gain as a function of the voltage at the multiplier voltage input terminal of the controller. The adaptive multiplier feedback control circuit increases the voltage at the multiplier voltage input of the controller is the input current to the PFC circuit increases. The PFC circuit may be used in an AC to DC converter of the driver circuit of a light fixture operable to provide power to a light source of the light fixture.
US09431885B2
Disclosed is a voice coil motor, the motor including a mover having a bobbin equipped with a lens and a coil block secured to an outer circumference of the bobbin; a stator having a magnet that is disposed in such a way as to face the coil block; elastic members coupled to a lower end of the bobbin and connected to both ends of the coil block; a base supporting the elastic members and the stator; and a cover can covering the mover, the stator and the base, with an opening being formed in the cover can to expose the lens therethrough, wherein each of the elastic members includes a terminal portion that extends between the cover can and a side surface of the base, the terminal portion including a short-circuit prevention portion so as to inhibit a short-circuit between the terminal portion and the cover can.
US09431877B2
A concentric generator usable with a gas turbine engine having a shaft. Disclosed embodiments include a generator with a rotor integral with the gas turbine shaft and a stator mounted concentrically with respect to the rotor. The stator may be mounted inside the turbine engine housing, or outside the turbine housing. In some embodiments, both the rotor and stator are mounted outside the turbine housing and rotation of the turbine shaft is translated to the rotor via a transmission.
US09431870B2
A motor, which has a braking function and is used in a linear actuator includes a main body, a rotation shaft, a braking means and a stopping means. The rotation shaft penetrates the center of the main body. The braking means includes a braking ring and a helical ring. The braking ring includes a plurality of curved plates. The helical ring surrounds outer edges of the curved plates. Each curved plate is put on the outer periphery of the rotation shaft. The stopping means is disposed between the main body and the braking means for restricting the rotation of any of the curved plates. By this arrangement, a better braking and decelerating function can be achieved.
US09431869B2
A hydraulic energy conversion device includes a main body being an annular member having a central hole, an output shaft mounted in the central hole of the main body with a centerline extended perpendicular to the central hole; a fixing plate located at an end of the main body and provided with a plurality of passage holes; an outer cover located at another end of the main body opposite to the fixing plate and having a central opening for the output shaft to outwardly extended through the outer cover; and a plurality of vanes circumferentially spaced on the output shaft to locate in a space defined between the main body, the fixing plate and the outer cover. The hydraulic energy conversion device is mounted in a hydraulic shock absorber to convert hydraulic energy into mechanical energy and output the same without hindering the hydraulic shock absorber from normal operation.
US09431862B2
A winding structure which is disposed over an armature and a commutator includes an equalizer. The equalizer includes a going portion and a return portion which are wound across one group of teeth through a slot and connected between two identical segments. In a case where an integer number is an expansion value among values which are integer multiples of a value which is acquired by dividing the total number of the slots by the total number of pole pairs, when one group of the teeth having the same total number as the expansion value is given as an element teeth group, the going portion and the return portion are wound across the element teeth group through the slots positioned at both sides of the element teeth group.
US09431861B2
A rotor for an electrical machine includes a base body, a plurality of permanent magnets which are arranged axially in rows on an outer surface of the base body. At least two of the permanent magnet rows are arranged so as to be mutually offset in an axial direction. First and second locking plates are respectively arranged at axial end faces of the base body to secure the rows of permanent magnets in the axial direction, with the first and second locking plates each having a surface which rests on respective axial ends of the permanent magnet rows. A bandage is wound around the base body to fix the permanent magnets to the outer surface of the base body.
US09431857B2
A permanent magnet rotor arrangement includes a rotor and a plurality of nonmagnetic, axially extending profiled tubes defining a closed channel and affixed circumferentially along the outer rim of the rotor. A plurality of permanent magnet pole pieces are arranged in the channels. A single pole piece is arranged in each channel. The cross-sectional profile of the pole piece does not correspond to the cross-sectional profile of the channel.
US09431844B2
This disclosure provides systems, methods, and apparatus for connecting with a charging device via a wireless communications network. In one aspect, a wireless charger comprises a transmitter configured to transmit a power signal. The wireless charger further comprises a device scanner configured to scan for one or more connection solicitations transmitted by devices. The wireless charger further comprises a receiver configured to receive a connection solicitation via the wireless communications network from the charging device in response to the transmitted power signal. The transmitter may be configured to transmit a connection request to establish a connection with the charging device in response to the received connection solicitation.
US09431836B2
A mobile power supply apparatus includes a base and a main body. The base has a first socket and a second socket disposed adjacent to the first socket, and both sockets, are exposed from a side of the base. The main body is extended from the base, and the main body, the first socket and the second socket are disposed on the same side of the base, and the main body has a slot, and the first socket and the second socket are accommodated at the bottom of the slot to constitute a storage structure.
US09431834B2
Systems, methods and apparatuses for wireless power transfer are disclosed. In one aspect, a wireless power transfer apparatus is provided comprising a casing with at least one projecting member projecting from an inner side of the surface of the casing that is subject to external compression forces. An induction coil and other components such as insulating layers and magnetically permeable members are positioned around at least one of the projecting members and maintained in position by the projecting members. The wireless power transfer apparatus is able to withstand large compressive forces, such as those imparted by heavy vehicles and the like passing over the apparatus when positioned on the ground in a wireless power transfer system.
US09431833B2
A battery system according to the present invention includes a secondary battery; a battery control unit that controls charging and discharging of said secondary battery; and a charging/discharging management unit that controls the charging and discharging of said secondary battery through said battery control unit, wherein said battery control unit, if an abnormality occurred during operation of said battery control unit, transmits remaining capacity data that represent a remaining capacity of said secondary battery that remained immediately before the abnormality occurred to said charging/discharging management unit.
US09431824B2
The power supply system includes a first DC power source, a second DC power source, and a power converter having a plurality of switching elements and reactors. The power converter is configured to be switchable, by the control of the plurality of switching elements, between a parallel connection mode in which DC voltage conversion is executed with the DC power sources connected in parallel with a power line and a series connection mode in which DC voltage conversion is executed with the DC power sources connected in series with the power line. Each of the switching elements is arranged to be included both in a power conversion path between the first DC power source and the power line PL and a power conversion path between the second DC power source and the power line.
US09431822B1
An over-current protection device includes two metal foils and a PTC material layer laminated therebetween. The PTC material layer has a volumetric resistivity between about 0.07 Ω-cm and 0.45 Ω-cm. The PTC material layer comprises a crystalline polymer and first and second conductive fillers dispersed therein. The first conductive filler is carbon black powder. The second conductive filler is selected from the group consisting of metal powder and conductive ceramic powder and has a volumetric resistivity less than 0.1 Ω-cm. The weight ratio of the second conductive filler to the first conductive filler is less than 4. The resistance jump R300/Ri of the over-current protection device is in the range from 1.5 to 5, where Ri is an initial resistance and R300 is a resistance after tripping 300 times.
US09431815B1
An adjustable cable fitting with a removable grip assembly secures and retains a cable passing therethrough. The grip assembly has a flexible tightening member and a resilient grommet inserted in the tightening member. The grip assembly is further disposed between a connector and a compression cap, such that the tightening member assists the grommet in creating and maintaining a watertight seal with the cable when tightening the compression cap to the connector. The tightening member also assists the grommet in securing and retaining the cable by preventing it from being pulled out of the fitting. The tightening member has a plurality of spaced apart retaining arms. Each arm has a retaining flange at one end that overhangs past an end of the grommet and which has gripper elements formed thereon for directly gripping the cable.
US09431809B2
An anchoring device for fastening guide wires on a roof has a base. The base has a mounting surface, a support, and carriers to which the wire guides are attached. The carriers are rotatably connected to the support and can be fixed in any desired relative position to the support, so that the anchoring device has many possibilities for holding the guide wires. The support has a number of parts which are present between the carriers, whereby between two adjacent parts of one or more carriers can be clamped. The wire guides are at different distances d1 and d2 from the central axis of the support and are at distances D1, D2 and D3 from each other.
US09431807B2
In a booster cable holding structure, a resin terminal supporting portion includes a tooth-edge surrounding wall on a pressed surface thereof to be pressed by a plurality of teeth arranged in a width direction of a pressing surface of a clip in a state the clip clamps a clamping connection portion, a wall inner surface of the tooth-edge surrounding wall closely surrounds each edge of at least two of the teeth of the clip or closely surrounds the edges of the at least two teeth together.
US09431801B2
One aspect is a method of coupling a feedthrough assembly to a surrounding case of an implantable medical device. An insulator having a plurality of conducting elements extending therethrough is provided. The insulator is placed with conducting elements within an opening of a case, thereby defining a narrow space between the insulator and the case. A braze preform is placed adjacent the insulator and case in the narrow space. The insulator is heated with a laser until raising the temperature of the adjacent preform above its melting point such that it fills the space between the insulator and the case.
US09431800B2
A gas-insulated electric device, by which a cross-sectional area of a central conductor can be reduced. The gas-insulated electric device includes an insulation tube that ranges to portions facing to ground potential portions for a central conductor and to upper-lower portions along the grounding potential portions, and is coaxially arranged along the central conductor in a state where a gap intervenes between the central conductor and the insulation tube; a conductive layer that is formed on an inner surface of an insulation tube and is electrically connected to the central conductor; and a ground layer that is formed on an inner surface or an outer surface of the insulation tube and is grounded; in which heat generated from the central conductor is radiated by convecting the insulation gas through the gap between the central conductor and insulation tube.
US09431792B2
A method and apparatus for active voltage regulation in optical modules utilize a voltage regulator to change the supply voltage provided to laser diode driver and receiver electronics to optimize module performance over temperature. The ambient temperature of the module is monitored. The outputs of the voltage regulator are controlled to provide voltages that are optimized with respect to temperature for the integrated circuits in the optical module. This control is implemented via a temperature sensitive feedback or a control input from a microcontroller with a temperature monitor input. The supply voltage is optimized to minimize the voltage required to achieve acceptable performance at a given temperature. Minimizing the supply voltage lengthens the lifetime of the integrated circuit and the optical module. The voltage regulator provides higher than standard supply voltages to a laser diode driver to compensate for higher laser voltage at low temperatures.
US09431788B2
A mode converter for use with a higher-order mode (HOM)-based fiber amplifiers takes the form of axicon-based configuration that is able to convert high power (tens of mW and higher) optical signals propagating in higher-order mode form into a diffraction-limited beam without experiencing the nonlinear effects (such as self-phase modulation) that are found when using a long-period grating (LPG) to create a diffraction-limited beam by performing mode conversion. The axicon may comprise a bulk optic device, a fiber-based device, or a GRIN-based configuration (where the refractive index profile of the GRIN element is formed to create a diffraction-limited signal).
US09431787B2
The refractive index of the first core portion 11a is higher than that of a clad 12, and the refractive index of the second core portion 11b is higher than that of the first core portion 11a. When light of the LP01 mode and light of the LP11 mode are standardized by power, in the core 11, an active element that stimulates to emit light of the predetermined wavelength is doped at a higher concentration in at least a part of an area where power of light of the LP01 mode is larger than that of light of the LP11 mode than at least a part of an area where the power of light of the LP11 mode is larger than that of light of the LP01 mode.
US09431784B2
A flat cable has a plurality of electric wires disposed in parallel, and a fiber member woven to thread through each of the electric wires along a juxtapositional direction of the electric wires. The fiber member is made of a fiber having an elastic recovery rate after elongation of 80% or more and 95% or less. The fiber has an initial modulus of 20 cN/dtex or more and 30 cN/dtex or less.
US09431783B1
A system includes a backplane and an auxiliary connector mounted to the backplane. The auxiliary connector is configured to mate with a corresponding mating auxiliary connector of an electrical power supply. A power connector is mounted directly to the backplane. The power connector is configured to mate with a corresponding mating power connector of the electrical power supply. A power bus bar is mounted to the backplane. The power bus bar is engaged in electrical contact with the power connector.
US09431769B2
An electrical connector includes: a shielding shell; an insulative housing received in the shielding shell, the insulative housing having two rows of mating ports in a vertical direction and a receiving slot between the two rows of mating ports; a contact module mounted in the insulative housing, the contact modules comprising an inner circuit board and a plurality of mating contacts mounted on an upper surface and a lower surface of the inner circuit board, the inner circuit board comprising a conductive area at a front end thereof; and a conductive foam received in the receiving slot and compressed between the conductive area of the inner circuit board and the shielding shell.
US09431762B2
A connector includes a holder (10) having a peripheral wall (11) open on opposite first and second ends. A first housing (21) is assembled in the peripheral wall (11) from the first end of the holder (10), a second housing (40) is connected to the first housing (21) from the second end of the holder (10). Stoppers (20) are formed on the peripheral wall (11) and resilient contact pieces (28) are formed on the first housing (21). The resilient contact pieces (28) are deflected by interference with the stoppers (20) in the process of assembling the first housing (21) into the peripheral wall (11). The resilient contact pieces (28) are locked to the stoppers (20) to regulate detachment of the first housing (21) from the peripheral wall (11) toward the first end in the process of assembling the first and second housings (21, 40).
US09431759B2
Disclosed herein is one embodiment of an apparatus that includes a housing that defines an interior cavity. The housing also includes a spring aperture. The apparatus further includes a spring coupled to the housing over the spring aperture, with the spring having a deflection portion and a feedthrough aperture. The apparatus also has an electrical connector coupled to the spring and extending through the feedthrough aperture and the spring aperture. The electrical connector may have a plurality of electrical traces extending from a location external to the housing to a location within the interior cavity of the housing.
US09431754B2
An electrical connector structure includes a housing and signal modules mounted therein. Each signal module includes an insulating body, conductive terminals and a ground shield. The insulating body has a first side having a guide projection, and a second side opposite to the first side and having a guide groove. When a first signal module has been mounted in the housing, a second signal module is guided and moved to mount into the housing by the guide groove of the second signal module receiving the guide projection of the first signal module, or by the guide projection of the second signal module sliding into the guide groove of the first signal module, whereby reducing relative movement between signal modules in the housing. The signal modules may be mounted one by one in the housing, or may be stacked side by side and then mounted in the housing as a whole.
US09431748B2
A plug-in device system has a closure unit blocking access to a first plug-in device element, for example a socket. The closure unit includes a rotary bezel which is coupled via a coupling to at least one shutter such that the rotation of the bezel effects a movement of the shutter from a closed position in an open position. Preferably, a locking assembly is additionally provided, which blocks movement of the rotary bezel and/or shutter in the closed position as long as no pressure is applied to the shutter. In addition, a safety device can be provided, which prevents the shutter from opening when a direct force is applied.
US09431745B2
A connector includes a plurality of terminals, a housing, and a retainer. The housing includes terminal housing chambers and partition portions. Each of the terminal housing chambers accommodates therein each of the plurality of terminals. Each of the partition portions is provided between adjacent terminal housing chambers and partition the adjacent terminal housing chambers from each other. The retainer is attached to the housing. The retainer is configured to prevent each of the terminals from falling out and to move between a temporary locking position and a proper locking position. The retainer includes communication cut portions. While the retainer is moving between the proper locking position and the temporary locking position, each of the communication cut portions is kept in contact with its corresponding partition portion and cut off communication between the adjacent terminal housing chambers.
US09431739B2
A terminal includes an insulating leading-end insulation portion (8) that is fixed to a conductive terminal main body (7) and that protrudes in front of a leading end of a terminal contact portion (72). The terminal contact portion (72) is formed in a cylindrical shape including a rod through-hole (71) penetrating in an axial direction, and the leading-end insulation portion (8) is formed as a part of an insulation member (82) including a penetrating rod portion (81) penetrating through the rod through-hole (71) and protruding to a back end side of the rod through-hole (71); and the leading-end insulation portion (8) and the back end side of the penetrating rod portion (81) are respectively engaged with respect to the terminal main body (7) in a removal direction to thereby fix the insulation member (82) into the terminal main body (7).
US09431736B2
A card edge connector includes a first insulator, a second insulator, first terminals, second terminals, and a circuit transferring board. The first insulator has a plug space, first terminal holes, and second terminal holes. The second insulator abuts against the first insulator and has first slotted holes, second slotted holes, and a slot. The first terminals are disposed within the first terminal holes and the first slotted holes, and the second terminals are disposed within the second terminal holes and the second slotted holes. The circuit transferring board is inserted into the slot. The circuit transferring board has first conductive portions and second conductive portions, where back contact portions of the first and second terminals are electrically coupled to the first and second conductive portions, thereby solving a problem of a conventional welded connection. The present invent also provides a card edge connector assembly.
US09431730B2
A mounting structure for a main terminal for mounting the main terminal to a housing in the state of one end portion to which a lead wire can be affixed being inserted into the housing, and the other end portion being exposed to the outside of the housing, in which the housing has a mounting hole for inserting and extracting the one end portion together with the lead wire; and the main terminal has a flange portion that can mount the main terminal about the mounting hole from the outside of the housing without involving rotation of the main terminal.
US09431728B2
A coaxial cable connector splice including a central conductor extending between opposed ends and an insulating structure interposed between the central conductor and an outer body.
US09431726B2
A multi-core cable 1 includes plural shielded electric wires 10 for signal transmission. The plural shielded electric wires 10 are bundled so as to make contact with the adjacent shielded electric wires 10, and sheaths 14 of the plural shielded electric wires 10 are respectively removed at the same position in the length direction, and outer conductors 13 of the plural shielded electric wires 10 at the position at which the sheaths 14 are removed are bundled by a metal wire 30 and the bundled portion is soldered and fastened.
US09431724B2
The present invention relates to a detachable connector (1) for a junction block comprising: an insulating body (2), a connection terminal (10) having a housing (8) for an electrically conductive wire (C) intended to be inserted through a first opening (3) of the insulating body (2) along an insertion direction (D) of the electrically conductive wire (C) in the insulating body (2), a connection plug (20) comprising a socket (21) from which extend two elastic connection branches (22a, 22b) intended to ensure an electrical contact with a complementary plug of the junction block intended to pass through a second opening (4) of the insulating body (2), the detachable connector (1) being characterized in that it comprises a passageway (6) for the electrically conductive wire (C) connecting the first housing (8) of the connection terminal (10) and a second housing (9) formed in the socket (21) of the connection plug (20).
US09431718B2
An antenna device has a feed line including a triplate line. Each triplate line has a central conductor and two ground plates sandwiching the central conductor via an air layer. At least a part of the triplate line is configured such that the two ground plates sandwich a center substrate including a wiring pattern as the central conductor provided on a dielectric substrate via the air layer.
US09431709B2
An antenna system is described which is comprised of an artificial magnetic conductor (AMC), an antenna element, and a feed network comprised of shielded feedlines whose outer conductor, or shield, is routed through the substrate of the AMC. The feedline outer conductor is connected to both the substantially continuous conductive surface and the array of capacitive patches forming the AMC. The shielded feedline suppresses the excitation of undesired TM modes within the AMC substrate, results in a stable return loss over a frequency range associated with the AMC's high surface impedance and surface wave bandgap.
US09431707B2
A source resonator for wirelessly transmitting power to a target device may include a magnetic field distribution adjusting unit that is configured to adjust the magnetic field generated by the source resonator. In one or more embodiments, the magnetic field distribution adjusting unit may adjust the magnetic field to be substantially uniform in a predetermined vicinity of the source resonator. For example, the magnetic field distribution adjusting unit may adjust the intensity of the magnetic field near the center of the source resonator to be substantially the same as the intensity of the magnetic field near an edge area of the source resonator.
US09431704B2
An antenna apparatus for a radar sensor having a plurality of individual antenna devices that interact through interference to generate and/or receive a radar beam at a predetermined angle of transmission and/or reception. The individual antenna devices are provided with a radar signal and are arranged such that a first angle of transmission and/or reception of the radar beam is determined via an analog beam formation and a second angle of transmission and/or reception of the radar beam is determined via a digital beam formation. The antenna apparatus further includes a feed device configured to generate the radar signal. In addition, the radar beam can be electronically pivoted. Also, an aircraft can include the antenna apparatus.
US09431692B2
A box mapper has (i) a frame configured to receive a sample box of RFID-tagged sample vials and (ii) a set of antennae configured to read the vial RFID tags of the sample vials to determine the identity and position of each sample vial in the sample box. In one embodiment, the set of antennae include two mutually orthogonal subsets of biphase digit antennae.
US09431681B2
A molten sodium secondary cell charges at a high temperature and discharges at a relatively lower temperature. The cell includes a sodium anode and a cathode. A sodium ion conductive solid membrane separates the cathode from the sodium anode and selectively transports sodium ions. A solar energy source includes a photovoltaic system to provide an electric charging potential to the sodium anode and the cathode and a solar thermal concentrator to provide heat to the cathode and catholyte composition to cause the molten sodium secondary cell to charge at a temperature in the range from about 300 to 800° C. The cell has a charge temperature and a charge voltage and a discharge temperature and a discharge voltage. The charge temperature is substantially higher than the discharge temperature, and the charge voltage is lower than the discharge voltage.
US09431680B2
An electric storage device includes: a rolled electrode assembly 10 formed by winding a positive electrode, a negative electrode, and a separator so as to have curved portions and linear portions; current collectors 7; and an electrolyte solution 3. A positive electrode substrate has at one end 10A an unformed portion 11E formed without a positive electrode mixture layer, and a negative electrode substrate has at the other end 10B an unformed portion 13E formed without a negative electrode mixture layer. The current collectors 7 are connected respectively to at least part of the linear portions in the unformed portion of the positive electrode at the one end 10A and that of the negative electrode at the other end 10B. The one end 10A in the positive electrode has a length greater than the winding length, and/or the other end 10B in the negative electrode has such a length.
US09431679B2
There is provided an electrode assembly comprising at least one stacked and folded type electrode stack in which a plurality of electrode units having electrode tabs are stacked in a state that the electrode units are separated by a sheet of separating film. The stacked and folded type electrode stack includes at least one stepped portion formed of electrode units having different areas and stacked on one another.
US09431675B2
A positive electrode material, having particles having a complex oxide OC1 core, an at least partial complex oxide OC2 coating, and an adhesive carbon surface deposit. The material is characterized in that the complex oxide OC1 is an oxide having a high energy density and in that the oxide OC2 is an oxide of a metal having a catalytic effect on the reaction of the carbon deposit, the oxide having good electronic conductivity. The presence of the OC2 layer facilitates the deposit of a carbon adhesive layer at the surface of the oxide particles, and improves the conductivity of the material when the latter is used as an electrode material. The electrode material can particularly be used in the manufacture of a lithium battery.
US09431674B2
There are provided an electrode assembly, and a battery cell, a battery pack, and a device. The electrode assembly includes a combination of two or more types of electrode units having different areas, wherein the electrode units are stacked such that steps are formed, and electrode units are formed such that a positive electrode and a negative electrode face one another at an interface between the electrode units.
US09431670B2
A fuel cell membrane electrode assembly is provided comprising a polymer electrolyte membrane which comprises a polymer that comprises bound anionic functional groups, wherein the polymer electrolyte membrane additionally comprises cerium cations. In another aspect, a fuel cell membrane electrode assembly is provided comprising a polymer electrolyte membrane which comprises a polymer that comprises bound anionic functional groups, wherein at least a portion of the anionic functional groups are in acid form and at least a portion of the anionic functional groups are neutralized by cerium cations. In another aspect, a polymer electrolyte membrane is provided which comprises a polymer that comprises bound anionic functional groups, wherein the polymer electrolyte membrane additionally comprises cerium cations, and wherein the amount of cerium cations present is between 0.001 and 0.5 charge equivalents based on the molar amount of acid functional groups present in the polymer electrolyte, more typically between 0.005 and 0.2, more typically between 0.01 and 0.1, and more typically between 0.02 and 0.05.
US09431661B2
A cathode catalyst layer used for a polymer electrolyte fuel cell that includes an electrolyte membrane is provided. The cathode catalyst layer comprises a catalyst having weight of not greater than 0.3 mg/cm2 of a reaction surface of the cathode catalyst layer that is adjoining the electrolyte membrane; and an electrolyte resin having oxygen permeability of not less than 2.2*10−14 mol/m/s/Pa in an environment of temperature of 80 degrees Celsius and relative humidity of 50%.
US09431660B2
In accordance with one embodiment, an electrochemical cell includes a negative electrode including a form of lithium, a positive electrode spaced apart from the negative electrode and including an electron conducting matrix, a separator positioned between the negative electrode and the positive electrode, an electrolyte including a salt, and a charging redox couple located within the positive electrode, wherein the electrochemical cell is characterized by the transfer of electrons from a discharge product located in the positive electrode to the electron conducting matrix by the charging redox couple during a charge cycle.
US09431659B2
Provided are an electrode binder for a secondary battery including an amine-based compound expressed by Chemical Formula 1 below and water-based binder particles including at least one carboxyl group as an end group, a method of preparing the same, and an electrode for a secondary battery including the electrode binder for a secondary battery
US09431655B2
A method is provided for fabricating an antimony anode. The method disperses antimony (Sb) particles in a layered carbon network using a process such as mechanical mixing, ball milling, stirring, or ultrasound sonication, forming a Sb/carbon composite. The Sb/carbon composite is mixed with a binder, forming a mixture, and the mixture is deposited on a current collector. Advantageously, the binder may be an aqueous (water soluble) binder. In one aspect, prior to dispersing the Sb particles in the layered carbon network, the Sb particles are coated with carbon. For example, the Sb particles may be dispersed in a solution including a polymer, where the solution may be an aqueous or organic. Alternatively, the Sb particles may be dispersed in a solution including a monomer. The monomer solution is polymerized to form polymer sheathed Sb core-shell structures, and then carbonized. Associated Sb anodes and Sb anode batteries are also provided.
US09431653B2
A process of producing active material for an electrode of an electrochemical cell includes providing lithium-intercalating carbon particles having an average particle size of 1 μm to 100 μm as component 1, providing silicon particles having an average particle size of 5 nm to 500 nm as component 2, providing a polymer or polymer precursor which can be pyrolyzed to form amorphous carbon and is selected from the group consisting of epoxy resin, polyurethane resin and polyester resin, as component 3, mixing components 1 to 3 in to a mixture and heat treating the mixture substantially in the absence of atmospheric oxygen at a temperature at which the pyrolyzable polymer or the pyrolyzable polymer precursor decomposes to form amorphous carbon.
US09431640B2
A mobile power supply includes a case, a control circuit board, a power storage module, a heating element and a thermal sheet. The case is with a hole formed thereon. The control circuit board is disposed in the case. A plurality of electrical connectors is welded on the control circuit board and is exposed by the case. The power storage module is disposed in the case and electrically connected to the control circuit board. The heating element is disposed on the case and exposed at the hole. The heating element is electrically connected to the control circuit board. The thermal sheet is attached to the case and in contact with the heating element. Thereby, the mobile power supply may provide heat and be used for heat preservation or for keeping warm.
US09431638B2
The present invention provides a separator for a non-aqueous secondary battery including a porous substrate and an adhesive porous layer that is formed at at least one side of the porous substrate and contains the following polyvinylidene fluoride-based resin A and the following polyvinylidene fluoride-based resin B. (1) Polyvinylidene fluoride resin A selected from the group consisting of vinylidene fluoride homopolymers having a weight average molecular weight of from 600,000 to 2,500,000, and vinylidene fluoride copolymers having a weight average molecular weight of from 600,000 to 2,500,000 and containing a structural unit derived from vinylidene fluoride and a structural unit derived from hexafluoropropylene, the total content of structural units derived from hexafluoropropylene in each of the vinylidene fluoride copolymers being 1.5 mol % or less of the total content of structural units in each of the vinylidene fluoride copolymer. (2) Polyvinylidene fluoride resin B containing a structural unit derived from vinylidene fluoride and a structural unit derived from hexafluoropropylene, the total content of structural units derived from hexafluoropropylene in the polyvinylidene fluoride resin B being greater than 1.5 mol % of the total content of structural units in the polyvinylidene fluoride resin B.
US09431633B2
Disclosed is an organic light emitting diode display device having improved light extraction efficiency and display quality. The organic light emitting diode display device includes a plurality of sub-pixels including organic light emitting cells arranged in an inner side of a substrate, a groove formed between neighboring sub-pixels, and a light extraction pattern formed over an outer surface of the substrate.
US09431629B2
Provided is an organic light-emitting display apparatus including: a substrate having one or more side walls; a display unit positioned on the substrate; and an encapsulation layer deposited over the display unit and contacting each of the one or more side walls, wherein a height of an outer end portion of the encapsulation layer is less than that of each of the side walls.
US09431623B2
The present invention relates to flexible devices including semiconductor nanocrystals, arrays including such devices, systems including the foregoing, and related methods. In one embodiment, a flexible light-emitting device includes a flexible substrate including a first electrode, an emissive layer comprising semiconductor nanocrystals disposed over the substrate, and second electrode disposed over the emissive layer comprising semiconductor nanocrystals, wherein, when the device is curved, the emissive layer comprising semiconductor nanocrystals lies substantially in the neutral plane of the device. In another embodiment, a light-emitting device includes an emissive layer comprising semiconductor nanocrystals disposed between two flexible substrates, a first electrode disposed over the emissive layer comprising semiconductor nanocrystals, and a second electrode disposed under the emissive layer comprising semiconductor nanocrystals. In certain preferred embodiments, at least one charge transport layer is disposed between one of the electrodes and the layer comprising semiconductor nanocrystals.
US09431616B2
Provided are a phosphaphenanthrene-carbazole-based organic light-emitting compound having superior light emitting properties, and an organic light-emitting device including the same.
US09431611B2
The present invention aims at providing a method for producing an organic electroluminescent element, by which a non-light-emitting region can be formed without any accompanying discoloration of a resin substrate. The method for producing an organic electroluminescent element includes a stacking step, in which a first electrode, an organic functional layer and a second electrode are formed by stacking on a resin substrate, and a light irradiation step, in which a prescribed region of the organic functional layer is irradiated with light being free from wavelength components at 340 nm or less.
US09431610B2
A phase change memory device includes a phase change memory unit and a heat sink. The phase change memory unit includes a phase change material layer pattern, a lower electrode beneath the phase change material layer pattern configured to heat the phase change material layer pattern, and an upper electrode on the phase change material layer pattern. The heat sink configured to absorb heat from the phase change memory unit. The heat sink has a top surface lower than a top surface of the upper electrode and is spaced apart from the phase change memory unit.
US09431609B2
The present disclosure relates to a method of forming an RRAM cell having a dielectric data layer that provides good performance, device yield, and data retention, and an associated apparatus. In some embodiments, the method is performed by forming an RRAM film stack having a bottom electrode layer disposed over a semiconductor substrate, a top electrode layer, and a dielectric data storage layer disposed between the bottom electrode and the top electrode. The dielectric data storage layer has a performance enhancing layer with a hydrogen-doped oxide and a data retention layer having an aluminum oxide. The RRAM film stack is then patterned according to one or more masking layers to form a top electrode and a bottom electrode, and an upper metal interconnect layer is formed at a position electrically contacting the top electrode.
US09431608B2
A method for manufacturing a hybrid non-volatile memory device includes forming first conductive pads; depositing a first conductive layer on a second area of the substrate; etching the first conductive layer to obtain second conductive pads, the second conductive pads having a section at their base smaller than at their top; protecting the upper face of the second conductive pads; oxidizing the substrate so that an insulating material layer covers the upper face of the first conductive pads and sides of the second conductive pads; depositing an oxide layer at the tops of the first conductive pads, resulting in memory elements of a first type supported by the first conductive pads; and forming memory elements of a second type at the tops of the second conductive pads. Each memory element of the second type is supported by one of the second conductive pads.
US09431600B2
A device includes a seed layer, a magnetic track layer disposed on the seed layer, an alloy layer disposed on the magnetic track layer, a tunnel barrier layer disposed on the alloy layer, a pinning layer disposed on the tunnel barrier layer, a synthetic antiferromagnetic layer spacer disposed on the pinning layer, a pinned layer disposed on the synthetic antiferromagnetic spacer layer and an antiferromagnetic layer disposed on the pinned layer, and another device includes a seed layer, an antiferromagnetic layer disposed on the seed layer, a pinned layer disposed on the antiferromagnetic layer, a synthetic antiferromagnetic layer spacer disposed on the pinned layer, a pinning layer disposed on the synthetic antiferromagnetic layer spacer, a tunnel barrier layer disposed on the pinning layer, an alloy layer disposed on the tunnel barrier layer and a magnetic track layer disposed on alloy layer.
US09431596B2
Embodiments of the present disclosure refers to an electronic device, comprising a first bracket that is made of a first material having a thermal conductivity greater than a first threshold and has therein at least one passage including a chamber; wherein the first bracket and the chamber define a closed space in which a cooling medium having a thermal conductivity greater than a second threshold is able to circulate; and wherein the chamber is provided with a driving body at at least one side wall of the chamber and the driving body is deformable under a perdetermined condition to change a capacity of the chamber so as to drive the cooling medium to flow.
US09431586B2
A ceramic conversion element includes a first ceramic layer having a first luminescent material, which transforms electromagnetic radiation of a first wavelength range into electromagnetic radiation of a second wavelength range. A second ceramic layer includes a second luminescent material, which transforms electromagnetic radiation of the first wavelength range into electromagnetic radiation of a third wavelength range. The first luminescent material and the second luminescent material are based on at least one inorganic compound containing oxygen and are different from one another. An optoelectronic component with a ceramic conversion element and a method for producing a ceramic conversion element are also specified.
US09431580B2
A method for producing an optoelectronic component comprising the steps of providing a semiconductor layer sequence having at least one active region, wherein the active region is suitable for emitting electromagnetic radiation during operation, and applying at least one layer on a first surface of the semiconductor layer sequence by means of an ion assisted application method.
US09431579B2
A semiconductor light emitting structure includes an epitaxial structure, an N-type electrode pad, a P-type electrode pad and an insulation layer. The N-type electrode pad and the P-type electrode pad are disposed on the epitaxial structure apart, wherein the P-type electrode pad has a first upper surface. The insulation layer is disposed on the epitaxial structure and located between the N-type electrode pad and the P-type electrode pad, wherein the insulation layer has a second upper surface. The first upper surface of the P-type electrode pad and the second upper surface of the insulation layer are coplanar.
US09431574B2
A light-emitting device includes a pixel having a transistor provided over a substrate, and a light-emitting element. The transistor includes a single-crystal semiconductor layer which forms a channel formation region, a silicon oxide layer is provided between the substrate and the single-crystal semiconductor layer, a source or a drain of the transistor is electrically connected to an electrode of the light-emitting element, and the transistor is operated in a saturation region when the light-emitting element emits light. Further, in the light-emitting device, a gray scale of the light-emitting element is displayed by changing a potential applied to the gate of the transistor.
US09431572B2
A method for providing and operating a device in a first mode as a light-emitting transistor and in a second mode as a high speed electrical transistor, including the following steps: providing a semiconductor base region of a first conductivity type between semiconductor emitter and collector regions of a second semiconductor type; providing, in the base region, a quantum size region; providing, in the base region between the quantum size region and the collector region, a carrier transition region; applying a controllable bias voltage with respect to the base and collector regions to control depletion of carriers in at least the carrier transition region; and applying signals with respect to the emitter, base, and collector regions to operate the device as either a light-emitting transistor or a high speed electrical transistor, depending on the controlled bias signal.
US09431564B2
A photoconductive switch comprising a photoconductive material and first and second contacts provided on said photoconductive material, wherein said first and second contacts comprise a plurality of interdigitated tracks, the tracks of each contact being separated from the tracks of the other contact by a photoconductive gap, the tracks being curved such that the minimum photoconductive gap measured in a first direction remains substantially similar regardless of the orientation of the first direction.
US09431560B2
An object of the present invention is to provide a film that is used as one layer of a multilayer structure articles such as a laminated glass, and a solar cell module, and prevents the intrusion of bubbles and the generation of unfilled portions at the edge portions of the film; and a multilayer structure articles obtained with the use of the film. A polyvinyl acetal resin film, having a thickness distribution in the width direction of 10% or less, and a volatile matter content of 1.0 mass % or less, in which as to a portion of 5% of the total width inside from each of both edges in the width direction, when each portion is heated at 150° C. for 30 minutes, the larger value of the heat shrinkage in the flow direction that is parallel to the film and perpendicular to the width direction is referred to as heat shrinkage MD1, and the other value is referred to as heat shrinkage MD2, and when central portion in the width direction of the film is heated at 150° C. for 30 minutes, the heat shrinkage in the flow direction that is parallel to the film and perpendicular to the width direction is referred to as heat shrinkage MD3, all the heat shrinkage MD1, heat shrinkage MD2, and heat shrinkage MD3 are 3 to 20%.
US09431559B2
A solar cell module structure is disclosed, which at least comprises a frame and a solar cell. The frame is composed of four sidebars that are mounted respectively at four sides of the solar cell. Each of the two opposite ends of each sidebar is formed with a 45-degree angle cut while each sidebar is composed of a top tongue plate, a bottom tongue plate, and a junction plate in a manner that the top tongue plate is arranged parallel to or near parallel to the bottom tongue plate while allowing the junction plate to connected and disposed perpendicular to the top and bottom tongue plates in respective. In addition, the solar cell is arranged at a position enclosed between the junction plate and the top and bottom tongue plates while being disposed at a distance respectively from the three plates.
US09431554B2
Buried structures for silicon devices which alter light paths and thereby form light traps. The lights traps couple more light to a photosensitive surface of the device, rather than reflecting the light or absorbing it more deeply within the device.
US09431553B2
The method of manufacturing a solar cell comprises the steps of: (a) providing the semiconductor substrate in a deposition chamber of a vapour deposition apparatus, which semiconductor substrate comprises a passivation layer at a first side thereof which passivation layer is patterned to define contact areas at which the copper-containing conductor is present; (b) supplying a gaseous silicon species into the deposition chamber, resulting in the formation of a surface layer of a copper silicide on a surface of the copper-containing conductor and in the formation of amorphous silicon on top of the passivation layer, and (c) providing a protective layer of an insulating silicon compound on the surface layer, wherein the protective cover comprising both the surface layer and the protective layer.
US09431552B2
A metallization paste or ink for making electrical contacts on solar cells has reduced diffusion in a silicon wafer. The paste or ink is configured for printing on a crystalline silicon substrate of a solar cell, wherein the paste comprises silicon particles, aluminum particles, and a paste vehicle. Alternatively, the paste comprises aluminum-silicon alloy particles.
US09431549B2
An embodiment of a nonvolatile charge trap memory device is described. In one embodiment, the device comprises a channel comprising silicon overlying a surface on a substrate electrically connecting a first diffusion region and a second diffusion region of the memory device, and a gate stack intersecting and overlying at least a portion of the channel, the gate stack comprising a tunnel oxide abutting the channel, a split charge-trapping region abutting the tunnel oxide, and a multi-layer blocking dielectric abutting the split charge-trapping region. The split charge-trapping region includes a first charge-trapping layer comprising a nitride closer to the tunnel oxide, and a second charge-trapping layer comprising a nitride overlying the first charge-trapping layer. The multi-layer blocking dielectric comprises at least a high-K dielectric layer.
US09431547B2
A semiconductor device having a structure which can prevent a decrease in electrical characteristics due to miniaturization is provided. The semiconductor device includes, over an insulating surface, a stack in which a first oxide semiconductor layer and a second oxide semiconductor layer are sequentially formed, and a third oxide semiconductor layer covering part of a surface of the stack. The third oxide semiconductor layer includes a first layer in contact with the stack and a second layer over the first layer. The first layer includes a microcrystalline layer, and the second layer includes a crystalline layer in which c-axes are aligned in a direction perpendicular to a surface of the first layer.
US09431543B2
A thin-film semiconductor device includes: a substrate; a gate electrode above the substrate; a gate insulation film above the gate electrode; a channel layer above the gate insulation film, the channel layer having a raised part; a channel protection layer over the raised part of the channel layer, the channel protection layer comprising an organic material, and the organic material including silicon, oxygen, and carbon; an interface layer at an interface between a top surface of the raised part of the channel layer and the channel protection layer, and comprises at least carbon and silicon that derive from the organic material; and a source electrode and a drain electrode each provided over a top surface and a side surface the channel protection layer, a side surface of the interface layer, a side surface of the raised part of the channel layer, and a top surface of the channel layer.
US09431534B2
A device includes a field effect transistor on an insulating film. A first fin extends vertically from a top side of a horizontal surface of a semiconductor substrate. An epitaxial cap rests on the first fin, with a left vertex on a left side of the epitaxial cap at a first horizontal distance from a reference line that vertically bisects the first fin, and a right vertex on the right side of the epitaxial cap at a second horizontal distance from the reference line, the first horizontal distance being at least twenty percent greater than the second horizontal distance; and a top vertex is at a third horizontal distance to the left of the reference line.
US09431532B1
A high voltage power MOSFET includes a semiconductor substrate doped by a first conducting type, a source doped by a second conducting type and over the semiconductor substrate, and a drain region doped by the second conducting type and on the semiconductor substrate. One or more drain layers doped by the second conducting type and on the semiconductor substrate span between the body region and the drain region. An insulating layer is formed on at least a portion of the body region and over the one or more drain layers. A voltage regulating layer on the insulating layer can produce voltage distributions in the one or more drain layers to deplete charge carriers to increase blockage voltage in an off state, and to accumulate charge carriers in an on state to reduce on-state resistance.
US09431529B2
Exemplary embodiments are disclosed for a semi-metal transistor, comprising: a semi-metal contact region adjacent to a metal contact; at least one semiconductor terminal; and a semi-metal transition region connected between the contact region and the semiconductor terminal that transitions from a substantially zero gap semi-metal beginning at an interface of the contact region into a semiconductor with an energy band gap towards the semiconductor terminal.
US09431519B2
A method of producing a III-V fin structure within a gap separating shallow trench isolation (STI) structures and exposing a semiconductor substrate is disclosed, the method comprising providing a semiconductor substrate, providing in the semiconductor substrate at least two identical STI structures separated by a gap exposing the semiconductor substrate, wherein said gap is bounded by said at least two identical STI structures, and, producing a III-V fin structure within said gap on the exposed semiconductor substrate, and providing a diffusion barrier at least in contact with each side wall of said at least two identical STI structures and with side walls of said III-V fin structure and wherein said semiconductor substrate is a Si substrate.
US09431515B2
Methods of forming semiconductor devices are provided. A method of forming a semiconductor device includes forming an insulating layer that includes a trench therein. The method includes forming a high-k layer in the trench. Moreover, the method includes forming a metal layer on the high-k layer, then performing a first heat treatment at a first temperature, and performing a second heat treatment at a second temperature that is higher than the first temperature.
US09431510B2
Methods and apparatus for metal semiconductor wafer bonding for high-Q devices are provided. An exemplary capacitor includes a first plate formed on a glass substrate, a second plate, and a dielectric layer. No organic bonding agent is used between the first plate and the glass substrate, and the dielectric layer can be an intrinsic semiconductor. A extrinsic semiconductor layer that is heavily doped contacts the dielectric layer. The dielectric and extrinsic semiconductor layers are sandwiched between the first and second plates. An intermetallic layer is formed between the first plate and the dielectric layer. The intermetallic layer is thermo compression bonded to the first plate and the dielectric layer. The capacitor can be coupled in a circuit as a high-Q capacitor and/or a varactor, and can be integrated with a mobile device.
US09431507B2
One method and device disclosed includes, among other things, forming a recessed sacrificial gate electrode having a recessed upper surface, performing at least one second etching process to define recessed sidewall spacers positioned adjacent the recessed sacrificial gate electrode, forming a plurality of sidewall spacers within a gate opening above the recessed sidewall spacers, wherein one of the spacers comprises a low-k insulating material that is positioned laterally between two other spacers and a gate cap layer, removing the recessed sacrificial gate electrode and forming a replacement gate structure in its place.
US09431495B2
A method of manufacturing a trench power MOSFET device with improved UIS performance and a high avalanche breakdown voltage is disclosed. The method includes performing a first etching of the epitaxial layer to form an active trench with an initial depth in an active area of the semiconductor substrate and a termination trench with a desired depth in a termination area of the semiconductor substrate, wherein the initial depth of the active trench is smaller than the desired depth of the termination trench and performing a second etching to increase the depth of the active trench to a desired depth wherein a depth difference between the desired depth of the active trench and the desired depth of the termination trench is smaller than a depth difference between the initial depth of the active trench and the desired depth of the termination trench.
US09431491B2
A semiconductor device including an active cell region formed over the surface of a silicon substrate and including a vertical MOSFET, a drain electrode formed over the surface of the silicon substrate and leading out the drain of the vertical MOSFET from the back surface of the silicon substrate, an external drain terminal formed over the drain electrode, and a source electrode formed over the active cell region so as to be opposed to the drain electrode at least along three sides at the periphery of the external drain terminal over the active cell region and connected to the source of the vertical MOSFET.
US09431487B2
A method to transfer a layer of graphene from one substrate to another substrate is provided. The method includes providing a first layered structure including, from bottom to top, a copper foil, a layer of graphene, an adhesive layer and a carrier substrate. The copper foil is removed exposing a surface of the layer of graphene. Next, an oxide bonding enhancement dielectric layer is formed on the exposed surface of the layer of graphene. A second layered structure including a receiver substrate and a dielectric oxide layer is provided. Next, an exposed surface of the dielectric oxide layer is bonded to an exposed surface of the oxide bonding enhancement dielectric layer. The carrier substrate and the adhesive layer are removed exposing the layer of graphene.
US09431478B2
A semiconductor device includes a first multi-channel active pattern defined by a field insulating layer and extending along a first direction, the first multi-channel active pattern including a first portion having a top surface protruding further in an upward direction than a top surface of the field insulating layer and a second portion on both sides of the first portion, the second portion having sidewalls with a continuous profile and a top surface protruding further in the upward direction than the top surface of the field insulating layer and protruding in the upward direction less than the top surface of the first portion, a gate electrode on the first portion of the first multi-channel active pattern and extending along a second direction different from the first direction, and a first source/drain region on the second portion of the first multi-channel active pattern and contacting the field insulating layer.
US09431475B2
A component includes a substrate and a capacitor formed in contact with the substrate. The substrate can consist essentially of a material having a coefficient of thermal expansion of less than 10 ppm/° C. The substrate can have a surface and an opening extending downwardly therefrom. The capacitor can include at least first and second pairs of electrically conductive plates and first and second electrodes. The first and second pairs of plates can be connectable with respective first and second electric potentials. The first and second pairs of plates can extend along an inner surface of the opening, each of the plates being separated from at least one adjacent plate by a dielectric layer. The first and second electrodes can be exposed at the surface of the substrate and can be coupled to the respective first and second pairs of plates.
US09431472B2
An organic light-emitting diode (OLED) display and a method of manufacturing the same are disclosed. In one aspect, the OLED display includes a plurality of pixels, each of the pixels including at least one wiring configured to receive an electrical signal and a storage capacitor formed on the same layer as the wiring. The wiring includes a first conductive pattern layer, an intermediate insulation pattern layer, and a second conductive pattern layer that are sequentially stacked. The first and second conductive pattern layers are electrically connected to each other through a first via hole.
US09431466B2
The present invention is to provide a light emitting device capable of obtaining a certain luminance without influence by the temperature change, and a driving method thereof. A current mirror circuit formed by using a transistor is provided for each pixel. The first transistor and the second transistor of the current mirror circuit are connected such that the drain currents thereof are maintained at proportional values regardless of the load resistance value. Thereby, a light emitting device capable of controlling the OLED driving current and the luminance of the OLED by controlling the drain current of the first transistor at a value corresponding to a video signal in a driving circuit, and supplying the drain current of the second transistor to the OLED, is provided.
US09431465B2
An object is to improve reliability of a light-emitting device. A light-emitting device has a driver circuit portion including a transistor for a driver circuit and a pixel portion including a transistor for a pixel over one substrate. The transistor for the driver circuit and the transistor for the pixel are inverted staggered transistors each including an oxide semiconductor layer in contact with part of an oxide insulating layer. In the pixel portion, a color filter layer and a light-emitting element are provided over the oxide insulating layer. In the transistor for the driver circuit, a conductive layer overlapping with a gate electrode layer and the oxide semiconductor layer is provided over the oxide insulating layer. The gate electrode layer, a source electrode layer, and a drain electrode layer are formed using metal conductive films.
US09431457B1
A magnetic memory array and a method for implementing the magnetic memory array for use in Solid-State Drives (SSDs) are provided. A plurality of magnetic pillar memory cells is formed using a deposition and/or growth process to produce a magnetic memory array substantially avoiding milling of magnetic materials.
US09431442B2
A camera module including a die having a top side and a bottom side, an image sensor is positioned on the top side of the die and a conductive via is formed through the die to provide an electrical connection between the top side and the bottom side; an overmold casing formed around the die; and a lens holder assembly attached to the top side of the die and the overmold casing. A method of producing a camera module including providing an image sensor die that is overmolded within a casing, the image sensor die having a top side and a bottom side, wherein an image sensor is positioned on the top side and a conductive via is formed through the image sensor die from the top side to the bottom side; and attaching a lens holder to the top side of the image sensor die.
US09431436B2
A method of manufacturing an array substrate is disclosed. A first conductive pattern, a first insulating layer, a second conductive pattern, and a second insulating layer on a base substrate is successively formed. The second insulating layer and the first insulating layer are patterned with a double-tone mask. At least a half lap joint via hole in the second insulating layer, and at least a full lap joint via hole in both the first insulating layer and the second insulating layer is formed. The second conductive pattern corresponds to a part of the half lap joint via hole, and the first conductive pattern corresponds to the whole of the full lap joint via hole. A third conductivity pattern is formed on the surface of the second conductivity pattern and the first insulating layer and a fourth conductive pattern is formed on the surface of the first conductive pattern.
US09431434B2
Embodiments of the present invention provide a method of manufacturing a pixel unit, in which only a single patterning process and a single doping process are performed on a polysilicon layer so as to form heavily doped regions of a thin film transistor and a lower electrode of a storage capacitor respectively, thereby reducing numbers of photolithography and masking processes required to manufacture a LTPS-TFT, shortening time periods for development and mass production, and reducing complexity of processes as well as monitoring difficulty, and decreasing the production cost. The present invention further provides a pixel unit manufactured according to the method, an array substrate and a display device including the same.
US09431422B2
Some embodiments include methods of forming semiconductor constructions. Alternating layers of n-type doped material and p-type doped material may be formed. The alternating layers may be patterned into a plurality of vertical columns that are spaced from one another by openings. The openings may be lined with tunnel dielectric, charge-storage material and blocking dielectric. Alternating layers of insulative material and conductive control gate material may be formed within the lined openings. Some embodiments include methods of forming NAND unit cells. Columns of alternating n-type material and p-type material may be formed. The columns may be lined with a layer of tunnel dielectric, a layer of charge-storage material, and a layer of blocking dielectric. Alternating layers of insulative material and conductive control gate material may be formed between the lined columns. Some embodiments include semiconductor constructions, and some embodiments include NAND unit cells.
US09431418B2
A vertical memory device and a method of manufacturing a vertical memory device are disclosed. The vertical memory device includes a substrate, a plurality of channels, a charge storage structure, a plurality of gate electrodes, a first semiconductor structure, and a protection layer pattern. The substrate includes a first region and a second region. The plurality of channels is disposed in the first region. The plurality of channels extends in a first direction substantially perpendicular to a top surface of the substrate. The charge storage structure is disposed on a sidewall of each channel. The plurality of gate electrodes is arranged on a sidewall of the charge storage structure and is spaced apart from each other in the first direction. The first semiconductor structure is disposed in the second region. The protection layer pattern covers the first semiconductor structure. The protection layer pattern has a thickness substantially similar to a thickness of a lowermost gate electrode.
US09431412B1
According to one embodiment, a semiconductor memory device includes a first array extending in a first direction, a second array extending in the first direction, and a second electrode film. The second array is arranged with the first array in a second direction crossing the first direction. The second electrode film provided between the first array and the second array. The second electrode film extends in the first direction. Each of the first array and the second array include a first structure, a second structure arranged in the first direction, a fourth insulating film provided between the first structure and the second structure, and a third insulating film provided between the first structure and the second electrode film, provided also between the first structure and the fourth insulating film.
US09431411B1
A 3D NAND memory has vertical NAND strings across multiple memory layers above a substrate, with each memory cell of a NAND string residing in a different memory layer. Word lines in each memory layer each has a series of socket components aligned to embed respective floating gates of a group memory cells. This structure allows reduction in cell dimension as well as reducing floating-gate perturbations between neighboring cells. The memory is fabricated by using odd and even subarrays of vertical shafts on a multi-layer slab to create at different times odd and even socket components that overlap to form continuous word lines with socket components. In particular, with only three masks, the even memory cells are fabricated to have their word line socket component enlarged to overlap with those of the odd memory cells in order to form continuous word lines in the row direction.
US09431409B2
A three dimensional memory device including a substrate and a semiconductor channel. At least one end portion of the semiconductor channel extends substantially perpendicular to a major surface of the substrate. The device also includes at least one charge storage region located adjacent to semiconductor channel and a plurality of control gate electrodes having a strip shape extending substantially parallel to the major surface of the substrate. The plurality of control gate electrodes include at least a first control gate electrode located in a first device level and a second control gate electrode located in a second device level located over the major surface of the substrate and below the first device level. The device also includes an etch stop layer located between the substrate and the plurality of control gate electrodes.
US09431400B2
A highly integrated DRAM is provided. A bit line is formed over a first insulator, a second insulator is formed over the bit line, third insulators which are in a stripe shape and the like are formed over the second insulator, and a semiconductor region and a gate insulator are formed to cover one of the third insulators. The bit line is connected to the semiconductor region through first contact plugs. Then, a conductive film is formed and subjected to anisotropic etching to form word lines at side surfaces of the third insulators, and a second contact plug is formed to be connected to a capacitor at a top of the one of the third insulators. By synchronizing the word lines, electric charge is accumulated or released through the capacitor. With such a structure, the area of a memory cell can be 4F2.
US09431399B1
A method for forming a semiconductor device comprises forming a first fin and a second fin on a semiconductor substrate, forming a sacrificial gate stack over a channel region of the first fin and the second fin, depositing a layer of spacer material over the first fin and the second fin, depositing a layer of dielectric material over the layer of spacer material, removing a portion of the dielectric material to form a first cavity that exposes a portion of the first fin, epitaxially growing a first semiconductor material on the exposed portion of the first fin to form a source/drain region on the first fin, depositing a protective layer on the source/drain region on the first fin, removing a portion of the dielectric material to form a second cavity that exposes a portion of the second fin, and epitaxially growing a source/drain region on the second fin.
US09431398B2
According to one embodiment, a chip has a circuit with at least one p channel field effect transistor (FET); at least one n channel FET; a first and a second power supply terminal; wherein the n channel FET, if supplied with the upper supply potential at its gate, supplies the lower supply potential to the gate of the p channel FET; and the p channel FET, if supplied with the lower supply potential at its gate, supplies the upper supply potential to the gate of the n channel FET; wherein the logic state of the gate of the p channel FET and of the n channel FET can only be changed by at least one of the first and second supply voltage to the circuit; and a connection coupled to the gate of the p channel FET or the n channel FET and a further component of the semiconductor chip.
US09431397B2
A device includes a wafer substrate including an isolation feature, at least two fin structures embedded in the isolation feature, and at least two gate stacks disposed around the two fin structures respectively. A first inter-layer dielectric (ILD) layer is disposed between the two gate stacks, with a dish-shaped recess formed therebetween, such that a bottom surface of the recess is below the top surface of the adjacent two gate stacks. A second ILD layer is disposed over the first ILD layer, including in the dish-shaped recess. The second ILD includes nitride material; the first ILD includes oxide material.
US09431376B2
Exemplary embodiments provide a substrate for mounting multiple power transistors. The substrate has a first metallization on which the power transistors are mountable with an associated collector or emitter, and which extends in at least one line on the substrate. A second metallization extends in an area next to the at least one line of the first metallization, for connection to the remaining ones of the emitters or collectors of the power transistors. A third metallization allows connection to gate contact pads of the power transistors. The third metallization includes a gate contact and at least two gate metallization areas, which are interconnectable. The gate metallization areas are arranged in parallel to the at least one line and spaced apart in a longitudinal direction of the at least one line. At least one gate metallization area is provided as a gate island surrounded on the substrate by the second metallization.
US09431373B2
A three-dimensional integrated structure may include two assembled integrated circuits respectively including two metallic lines, and at least two cavities passing through one of the integrated circuits and opening onto two locations respectively in electrical contact with the two metallic lines. The cavities may be sized to place a measuring apparatus at the bottom of the cavities, and in electrical contact with the two locations.
US09431367B2
A method of forming a semiconductor package includes forming an interconnecting structure on an adhesive layer, wherein the adhesive layer is on a carrier. The method further includes placing a semiconductor die on a surface of the interconnecting structure. The method further includes placing a package structure on the surface of the interconnecting structure, wherein the semiconductor die fits in a space between the interconnecting structure and the package structure. The method further includes performing a reflow to bond the package structure to the interconnecting structure.
US09431358B2
An amplifier includes: a first transistor that includes a first main electrode, a second main electrode, and a first control electrode, a first input signal being input to the first main electrode, a first output signal being output from the second main electrode; a reference potential line that is disposed on a signal line connected to the second main electrode with an insulator interposed therebetween; a first capacitor that is disposed between the first control electrode and the reference potential line; and a first phase shifter configured to shift a phase of a first return current such that the phase of the first return current which flows from the second main electrode to the first control electrode via the reference potential line and the first capacitor has a phase difference, which is greater than 90 degrees and less than 270 degrees, from the phase of the first input signal.
US09431354B2
Embodiments of the present invention provide integrated circuits and methods for activating reactions in integrated circuits. In one embodiment, an integrated circuit is provided having reactive material capable of being activated by electrical discharge, without requiring a battery or similar external power source, to produce an exothermic reaction that erases and/or destroys one or more semiconductor devices on the integrated circuit.
US09431348B2
A marker which is a reference of a coordinate position defining a region of a chip that is manufactured in a semiconductor substrate is formed. A crystal defect on the semiconductor substrate is detected. The coordinate position of the detected crystal defect is detected on the basis of the marker. Therefore, it is possible to detect the position of a semiconductor chip including the crystal defect among the semiconductor chips manufactured on the semiconductor substrate. As a result, it is possible to easily detect the position of the semiconductor device including the position of the crystal defect on the semiconductor substrate.
US09431332B2
A semiconductor package comprising: a semiconductor chip comprising a first surface on a first side of the semiconductor chip and a second surface on a second side of the semiconductor chip, wherein the first side and the second side are opposite sides of the semiconductor chip; a through-electrode penetrating the semiconductor chip between the first surface and the second surface; a passivation layer formed on the second surface of the semiconductor chip; and an electrode pad formed on an upper surface of the passivation layer and electrically connected to the through-electrode, wherein the passivation layer comprises a first passivation layer formed on the second surface of the semiconductor chip and a second passivation layer formed on an upper surface of the first passivation layer, and the electrode pad penetrates the second passivation layer to contact the upper surface of the first passivation layer.
US09431321B2
According to one embodiment, a method of manufacturing a semiconductor device comprises forming through holes extending through a semiconductor substrate in a thickness direction to integrated circuits in chip areas, and forming a first mark opening and second mark openings in a dicing line. The method detects the first mark opening based on positions of the second mark openings. Then, the method performs alignment of exposure positions based on the position of the first mark opening to perform photolithography, thereby forming a resist pattern on the back side of the semiconductor substrate.
US09431319B2
An integrated circuit package may include a semiconductor die, a heat spreader, and encapsulation material. The semiconductor die may contain an electronic circuit and exposed electrical connections to the electronic circuit. The heat spreader may be thermally-conductive and may have a first outer surface and a second outer surface substantially parallel to the first outer surface. The first outer surface may be affixed to all portions of a silicon side of the semiconductor die in a thermally-conductive manner. The encapsulation material may be non-electrically conductive and may completely encapsulate the semiconductor die and the heat spreader, except for the second surface of the heat spreader. The second surface of the heat spreader may be solderable and may form part of an exterior surface of the integrated circuit package.
US09431316B2
A semiconductor device has semiconductor die mounted to a temporary carrier. An encapsulant is deposited over the die and carrier. A channel is formed in a back surface of the die, either while in wafer form or after mounting to the carrier. The channel corresponds to a specific heat generating area of the die. The channel can be straight or curved or crossing pattern. The carrier is removed. An interconnect structure is formed over the encapsulant and die. The semiconductor die are singulated through the encapsulant. A TIM and heat sink are formed over the channel and encapsulant. Alternatively, a conformal plating layer can be formed over the channel and encapsulant. A conductive via can be formed through the encapsulant, and TSV formed through the die. The die with channels can be mounted over a second semiconductor die which is mounted to the interconnect structure.
US09431306B2
A method includes forming a plurality of trenches to define a fin, forming a first layer of insulating material in the trenches, forming a sidewall spacer on opposite sides of the fin above an upper surface of the first layer, removing the first layer and performing a fin-trimming etching process to define a plurality of increased-size trenches. The method also includes forming a first oxidation-blocking layer of insulating material in the increased-size trenches, forming a second layer of insulating material above the oxidation-blocking layer, and performing a thermal anneal process to convert at least a part of the portion of the fin that is in contact with the second layer of insulating material into an oxide fin isolation region.
US09431297B2
Methods of semiconductor device fabrication are provided including those that provide a substrate having a plurality of trenches disposed in a dielectric layer formed above the substrate. A via pattern including a plurality of openings may be defined above the substrate. A spacer material layer is formed on a sidewall at least one trench. Via holes can be etched in the dielectric layer using the via pattern and spacer material layer as a masking element.
US09431290B2
A semiconductor device manufacturing method is disclosed by which electron beam irradiation is accomplished at a low cost while exhibiting uniform characteristics. A wafer stack consisting of multiple stacked wafers is irradiated with an electron beam from both the front surface and reverse surface. As such, a semiconductor device manufacturing method is provided whereby the electrical characteristics are extremely uniform between wafers, and costs are reduced by reducing the number of electron beam irradiations.
US09431286B1
A semiconductor device with a buried layer has a deep trench structure abutting the buried layer and a self-aligned sinker along sidewalls of the deep trench structure. The semiconductor device may be formed by forming a portion of a deep trench down to the buried layer, and implanting dopants into a substrate of the semiconductor device along sidewalls of the deep trench, and subsequently forming a remainder of the deep trench extending below the buried layer. Alternatively, the semiconductor device may be formed by forming the deep trench to extend below the buried layer, and subsequently implanting dopants into the substrate of the semiconductor device along sidewalls of the deep trench.
US09431285B2
A method of manufacturing a semiconductor device including performing a first thermal processing a silicon substrate in a first atmosphere and at a first temperature to remove an oxide film above a surface of the silicon substrate, and after the first thermal processing, performing a second thermal processing the silicon substrate in a second atmosphere containing hydrogen and at a second temperature lower than the first temperature to terminate the surface of the silicon substrate with hydrogen.
US09431276B2
A rinsing liquid (DIW) is discharged from a rinsing liquid discharge port formed in a blocking member to perform rinsing processing to a substrate surface while a nitrogen gas is supplied into a clearance space, and a liquid mixture (IPA+DIW) is discharged from a liquid mixture discharge port formed in the blocking member to replace the rinsing liquid adhering to the substrate surface with the liquid mixture while the nitrogen gas is supplied into the clearance space. Thus, an increase of the dissolved oxygen concentration of the liquid mixture can be suppressed upon replacing the rinsing liquid adhering to the substrate surface with the liquid mixture, which makes it possible to securely prevent from forming an oxide film or generating watermarks on the substrate surface.
US09431272B2
Provided is a printed circuit board (PCB). The PCB includes a board body that includes a first surface and a second surface opposite the first surface, a semiconductor chip mounting region that is disposed on the first surface of the board body, and includes a plurality of semiconductor chip mounting parts on which a semiconductor chip may be mounted, a through region that is disposed at a peripheral portion of the semiconductor chip mounting region, and includes a plurality of through holes passing through the board body, and an external terminal forming region that is disposed on the second surface of the board body, wherein a plurality of external terminal forming parts are disposed at the external terminal forming region in correspondence with the respective semiconductor chip mounting parts.
US09431265B2
Methods that enable fin cut at very tight pitch are provided. After forming a first set of paired sidewall image transfer (SIT) spacers and a second set of paired SIT spacers composed of different materials, portions of the first set of the paired SIT spacers can be selectively removed without adversely affecting the second set of the paired SIT spacers, even portions of both sets of the paired SIT spacers are exposed by the cut mask due to the different etching characteristics of the different materials.
US09431261B2
Technologies for a process used to reduce the height of a raised profile of a device. One or more raised profiles on one or more layers of a device are removed using a combined chemical-mechanical polishing/etching process. In some implementations, a protective layer is applied to a top layer of a device grown on a substrate. A combined chemical-mechanical polishing/etching process may commence whereby one or more raised profiles of the protective layer are removed through a planarization process, exposing at least a portion of a raised profile of a layer below the protective layer. Material may be removed using an etchant to reduce the height of the raised profile.
US09431246B2
According to one embodiment, a semiconductor device includes a first semiconductor part and a conductive electrode. The first semiconductor part is made of SiC. The SiC contains a first element as an n-type or p-type impurity. The first semiconductor part has a first interface part. The first interface part is configured to have maximum area density of the first element. The c conductive electrode is electrically connected to the first interface part.
US09431243B2
Fabrication of monolithic lattice-mismatched semiconductor heterostructures with limited area regions having upper portions substantially exhausted of threading dislocations, as well as fabrication of semiconductor devices based on such lattice-mismatched heterostructures.
US09431236B2
A method of manufacturing a semiconductor device includes forming a thin film containing a specific element, oxygen, carbon, and nitrogen by performing a cycle a predetermined number of times. The cycle includes supplying a specific element-containing gas, supplying a carbon-containing gas, supplying an oxidizing gas, and supplying a nitriding gas. The act of supplying the nitriding gas is performed before the act of supplying the specific element-containing gas, and the act of supplying the carbon-containing gas and the act of supplying the oxidizing gas are not performed until the act of supplying the specific element-containing gas is performed.
US09431234B1
Disclosed are curable linear polymers that can be used as active and/or passive organic materials in various electronic, optical, and optoelectronic devices. In some embodiments, the device can include an organic semiconductor layer and a dielectric layer prepared from such curable linear polymers. In some embodiments, the device can include a passivation layer prepared from the linear polymers described herein. The present linear polymers can be solution-processed, then cured thermally (particularly, at relatively low temperatures) and/or photochemically into various thin film materials with desirable properties.
US09431230B2
In a mass spectrometer, a method for trapping ions includes providing at least first and second multipole rod sets positioned in tandem, introducing a plurality of ions into the first rod set, applying an RF potential to at least one of said rod sets to generate a radial trapping potential within said rod sets, applying a radial DC potential to said first rod set so as to modulate said radial trapping potential set as a function of m/z of said ions, and applying a DC potential between said two rod sets to provide an axial bias potential between said two rod sets. The method can further comprise selecting an axial barrier potential to selectively extract ions having an m/z ratio less than a threshold from said first rod set into said second rod set.
US09431213B2
An interface, a scanning electron microscope and a method for observing an object that is positioned in a non-vacuum environment. The method includes: generating an electron beam in the vacuum environment; scanning a region of the object with the electron beam while the object is located below an object holder; wherein the scanning comprises allowing the electron beam to pass through an aperture of an aperture array, pass through an ultra thin membrane that seals the aperture, and pass through the object holder; wherein the ultra thin membrane withstands a pressure difference between the vacuum environment and the non-vacuum environment; and detecting particles generated in response to an interaction between the electron beam and the object.
US09431210B2
A retarding field scanning electron microscope for imaging a specimen is described. The microscope includes a scanning deflection assembly configured for scanning an electron beam over the specimen, one or more controllers in communication with the scanning deflection assembly for controlling a scanning pattern of the electron beam, and a combined magnetic-electrostatic objection lens configured for focusing the electron beam, wherein the objective lens includes a magnetic lens portion and an electrostatic lens portion. The electrostatic lens portion includes an first electrode configured to be biased to a high potential, and a second electrode disposed between the first electrode and the specimen plane, the second electrode being configured to be biased to a potential lower than the first electrode, wherein the second electrode is configured for providing a retarding field of the retarding field scanning electron microscope. The retarding field scanning electron microscope further includes a voltage supply being connected to the second electrode for biasing the second electrode to a potential and being in communication with the one or more controllers, wherein the one or more controllers synchronize a variation of the potential of the second electrode with the scanning pattern of the electron beam.
US09431205B1
A field emission transistor includes a gate, a fold over emitter, and fold over collector. The emitter and the collector are separated from the gate by a void and are separated from a gate contact by gate contact dielectric. The void may be a vacuum, ambient air, or a gas. Respective ends of the emitter and the collector are separated by a gap. Electrons are drawn across gap from the emitter to the collector by an electrostatic field created when a voltage is applied to the gate. The emitter and collector include a first conductive portion substantially parallel with gate and a second conductive portion substantially perpendicular with gate. The second conductive portion may be formed by bending a segment of the first conductive portion. The second conductive portion is folded inward from the first conductive portion towards the gate. Respective second conductive portions are generally aligned.
US09431204B2
A light source (7) with a gas-discharge lamp includes a control module (16) with a driver circuit, an ignition module (17) for producing a substantially high voltage, and a gas-filled burner (18) in which an electric arc is ignited and maintained between two electrodes (19, 20). The control module (16), ignition module (17), and burner (18) are attached to a mutual support system (21) and combined in a single unit. Lighting equipment (1) for a motor vehicle includes at least one light source (7).
US09431192B2
An exemplary embodiment of an electrical device is disclosed. The electrical wiring device preferably includes a frame, a rocker, and a resilient member. In use, the rocker pivotally rotates through a range of travel, for example, from a first position to a second position. As the rocker moves, the resilient member imparts a force on the rocker, biasing the rocker in the first position and the second position. In a particularly preferred embodiment, the resilient member extends horizontally across the electrical wiring device (e.g., along a minor axis of the rocker).
US09431190B2
A portable computing device is disclosed. The portable computing device can take many forms such as a laptop computer, a tablet computer, and so on. The portable computing device can include at least a single piece housing. The single piece housing including a plurality of steps. The plurality of mounting steps are formed by at least removing a preselected amount of housing material at predetermined locations on the interior surface. At least some of the mounting steps are used to mount at least some of the plurality of internal operating components to the housing.
US09431189B2
Configurable buttons for electronic devices such as portable electronic devices are provided. A configurable button may have a button member that moves relative to a device housing when it is desired to activate a switch. The button may have an associated touch sensor. The touch sensor may detect when a user's finger touches a particular portion of the button member. Contact with only this portion of the button member is generally inadvertent, so an actuator may be used to prevent or otherwise restrict motion of the button relative to a device housing. This prevents inadvertent activation of the button when a user is manipulating portions of an electronic device such as clip or lid, but does not intend to depress the button.
US09431183B2
A switch assembly and method of operation comprises a housing for supporting a plunger arrangement for moveable positioning of a plunger relative to the housing and plunger arrangement. The plunger arrangement comprises a retainer support for fixedly holding at least one terminal member within a retainer groove having a transverse channel passing from a first end to a second end of the retainer support.
US09431180B2
An energy storage arrangement includes at least two rechargeable energy storage devices connected in parallel. A first energy storage device has a plurality of lead-based storage elements, and a second energy storage device has a plurality of lithium-based storage elements. Between charge state limits of 0 to 100% a charge state interval is achieved in which the nominal voltage of the second energy storage device is in a range between the maximum charging voltage and the nominal voltage of the first energy storage device.
US09431178B2
To provide a solid electrolytic capacitor capable of high performance, the capacitor including: an anode element made of tantalum or niobium; a dielectric film disposed on the anode element; and a solid electrolytic layer disposed on the dielectric film, the dielectric film including: a first dielectric film made of an oxide of the tantalum or niobium, formed on a surface of the anode element; and a second dielectric film made of a composite metal oxide having a perovskite structure, formed on the first dielectric film.
US09431176B2
A multilayer ceramic electronic component including: a ceramic body having a plurality of dielectric layers stacked therein; active layers including a plurality of first and second internal electrodes formed to be alternately exposed to both end surfaces of the ceramic body with the dielectric layers interposed therebetween; and first and second external electrodes formed on the both end surfaces of the ceramic body and electrically connected to the first and second internal electrodes, respectively. The active layers may include a first active layer including a ferroelectric layer and a second active layer including a paraelectric layer, the first and second active layers being alternately stacked.
US09431171B2
The present invention relates to a method for molding a powder mold product according to which a powder mold product of uniform quality can be molded with excellent productivity. The present invention includes the steps of: preparing raw material powder 3 (a preparing step); interposing a mold assembly-use lubricant between an outer circumferential face 12s of a first punch (a lower punch 12) and an inner circumferential face 10s of a die 10, the lower punch 12 and the die 10 in this state being relatively shifted to apply the mold assembly-use lubricant to the inner circumferential face 10s of the die 10 (an applying step); and packing the raw material powder 3 into a cavity, a powder mold product 100 being molded by the raw material powder 3 being pressed (a molding step). In the applying step, while the mold assembly-use lubricant is discharged from a supply port 12i provided to the lower punch 12 and the discharged mold assembly-use lubricant is collected from a drain port 12o provided to the lower punch 12, the mold assembly-use lubricant is applied to the inner circumferential face 10s of the die 10.
US09431168B2
A contactless connector requires no physical contact. A terminated transmitting transmission line on a first board is parallel to a dual-terminated receiving transmission line on a second board. The boards are placed face-to-face with a small air gap in-between. A driver drives a driven pulse onto a first end of the transmitting transmission line. The driven pulse capacitively induces a positive induced pulse on the first end of the receiving transmission line. As the driven pulse travels from the first end to the second end of the transmitting transmission line, energy is transferred to the induced pulse, which travels down the receiving transmission line. Inductive coupling becomes stronger than capacitive as the length increases, so that at the second end, the induced pulse is negative and then swings positive. A Schmitt trigger receiver on the second end of the receiving transmission line detects the signal.
US09431163B2
A transformer includes a first coil spiraling inwardly in a second direction. A second coil spirals along the first coil on the outside relative to the first coil. First and second external electrodes are provided in third and fourth directions relative to a first line passing through a gravity center of the first coil and an outer end thereof, respectively, the third direction being perpendicular to the first line, and the fourth direction being opposite thereto. First and second lead-out conductors are connected to the outer end of the first and the second coil, respectively, and electrically connected to the first and the second external electrodes, respectively. Both coils spiral along each other throughout their lengths. By spiraling in the second direction, the first coil is, at the outer end, oriented in a fourth direction.
US09431158B2
The invention provides a barrel-shaped fireproof and explosion-proof surge protection device with the function of over-temperature protection, comprising a barrel-shaped housing, a barrel-shaped varistor and a cylindrical temperature protector, wherein the barrel-shaped housing houses the outer wall of the barrel-shaped varistor, the barrel-shaped varistor comprises a barrel-shaped varistor chip, an outer electrode, and an inner electrode, wherein the outer electrode is connected with an outer pin while the inner electrode is connected with an inner pin, the cylindrical temperature protector is arranged in the barrel space of the barrel-shaped varistor and is provided with two leading foots which are led out independently, or one of which is connected with the inner electrode of the barrel-shaped varistor and is led out, or one of which is connected with the inner electrode of the barrel-shaped varistor but is not led out.
US09431146B2
This disclosure relates to compositions and methods of manufacture of electrodes for batteries, including rechargeable lithium batteries, wherein at least one electrode comprises an electroactive material and a malleable metal. The electrode may be substantially free of other conductive additives and organic binders. Manufacture of the electrode may be performed without solvent or sintering.
US09431145B2
A semiconductor composition which comprises a soluble polyacene semiconductor and a polymeric semiconducting binder the binder having a permittivity greater than 3.4 at 000 Hz. The charge mobility of the semiconducting binder when measured in a pure state is greater than 10−7 cm2/Vs and more preferably greater than 10−6 cm2/Vs. Organic thin film transistors in which the source and drain electrodes are bridged by the semiconductor composition have desirable properties of reproducibility and charge mobility. The organic semiconducting composition can be applied by solution coating.
US09431137B2
A diagnostic system to monitor digital rod position indication (DRPI) signals of a DRPI system of a nuclear power plant, including a digital diagnostic unit connected between a DRPI display cabinet and a DRPI data cabinet of the DRPI system to monitor digital rod position signals of the DRPI data cabinet. The digital rod position signals include digital rod address signals and digital rod position data signals such that the digital diagnostic unit detects signal level variation and signal timing variation of the digital rod address signals and the digital rod position data signals to determine rod position errors of the DRPI system.
US09431136B2
A stable startup system includes a reactor vessel containing coolant, a reactor core submerged in the coolant, and a heat exchanger configured to remove heat from the coolant. The stable startup system further includes one or more heaters configured to add heat to the coolant during a startup operation and prior to the reactor core going critical.
US09431134B1
Disclosed herein is a joint structure between a top nozzle and a guide thimble. The joint structure includes an outer guide post, an inner-extension tube head, an inner-extension tube body, a wedge and the guide thimble. The outer guide post is provided with an external thread formed on a lower end thereof. The inner-extension tube head includes an annular retaining part formed on an upper end thereof. An internal thread is formed on a medial portion of the inner-extension tube head. An external thread is formed on each of upper and lower ends of the inner-extension tube body. A stop protrusion is provided under a lower end of the wedge. The wedge is welded to the inner-extension tube body after the top nozzle has been joined with the guide thimble. A stop protrusion receiving depression is formed in the guide thimble.
US09431131B2
The disclosed embodiments relate to components of a memory system that support timing-drift calibration. In specific embodiments, this memory system contains a memory device (or multiple devices) which includes a clock distribution circuit and an oscillator circuit which can generate a frequency, wherein a change in the frequency is indicative of a timing drift of the clock distribution circuit. The memory device also includes a measurement circuit which is configured to measure the frequency of the oscillator circuit. Additionally, the memory system contains a memory controller which can transmit a request to the memory device to trigger the memory device to measure the frequency of the oscillator circuit. The memory controller is also configured to receive the measured frequency from the memory device and uses the measured frequency to determine the timing drift in the memory device.
US09431127B2
Junction diodes fabricated in standard CMOS logic processes can be used as program selectors for One-Time Programmable (OTP) devices. An OTP device can have at least one OTP element coupled to at least one diode in a memory cell. With a metal fuse is used by the OTP element, at least one contact and/or a plurality of vias can be built (possibly with use of one or more jumpers) in the program path to generate more Joule heat to assist with programming. The jumpers are conductive and can be formed of metal, metal gate, local interconnect, polymetal, etc. The metal fuse can also have an extended area that is longer than required by design rules for enhanced programmability. The OTP element can be polysilicon, silicided polysilicon, silicide, polymetal, metal, metal alloy, local interconnect, thermally isolated active region, CMOS gate, or combination thereof.
US09431113B2
Systems, methods and/or devices are used to enable dynamic erase block grouping. In one aspect, the method includes (1) maintaining metadata for each erase block of a plurality of erase blocks in a data storage system, wherein a respective metadata for a respective erase block includes one or more characteristics of the respective erase block, (2) allocating a set of erase blocks, of the plurality of erase blocks, as unassociated erase blocks, (3) selecting two or more unassociated erase blocks in accordance with characteristics of the unassociated erase blocks so as to select unassociated erase blocks with similar characteristics, and (4) grouping the two or more unassociated erase blocks with similar characteristics to form a super block.
US09431112B2
A controller controls a memory including first and second strings. The first and second strings configure first and second string groups, respectively. In each string group, a set of memory cell transistors each from each string configures a unit. The controller is configured to: sequentially write, in the first string group, data in first units to which serially-coupled memory cell transistors respectively belong; sequentially write, in the second string group, data in first units to which serially-coupled memory cell transistors respectively belong; and sequentially write, in the first string group, data in second units to which serially-coupled memory cell transistors respectively belong.
US09431108B2
An integrated structure includes a first MOS transistor with a first controllable gate region overlying a first gate dielectric and a second MOS transistor neighboring the first MOS transistor and having a second controllable gate region overlying the first gate dielectric. A common conductive region overlies the first and second gate regions and is separated therefrom by a second gate dielectric. The common conductive region includes a continuous element located over a portion of the first and second gate regions and a branch extending downward from the continuous element toward the substrate as far as the first gate dielectric. The branch located between the first and second gate regions.
US09431097B2
A method of operation of a static random access memory (SRAM) storage element includes programming a value to the SRAM storage element prior to a power-down event. The method further includes, in response to a power-on event at the SRAM storage element after the power-down event, increasing a supply voltage of the SRAM storage element and sensing a state of the SRAM storage element to determine the value programmed to the SRAM storage element prior to the power-down event. In a particular example, an apparatus includes the SRAM storage element and control circuitry coupled to the SRAM storage element. The control circuitry may be configured to program the value to the SRAM storage element, to increase the supply voltage, and to sense the state of the SRAM storage element to determine the value programmed to the SRAM storage element prior to the power-down event.
US09431092B2
A memory device includes a plurality of memory blocks; an address counter suitable for generating a counted address which is used for a normal refresh operation and changed when all the memory blocks are refreshed; a target address generator suitable for generating a target address used for a target refresh operation, wherein the target address corresponds to an address of a word line to be additionally refreshed in the memory blocks; and a refresh controller suitable for controlling the memory blocks to be refreshed at different times during a first normal refresh operation, controlling a memory block among the memory blocks, which is first refreshed in the first normal refresh operation, to be refreshed through the target refresh operation, and controlling the memory block, which is first refreshed in the first normal refresh operation, to be refreshed last during a second normal refresh operation, based on the refresh command.
US09431085B2
Activation of portions of a memory is tracked to allow an affected portion of the memory to be refreshed before it is corrupted by multiple activations. An address for the accessed portion of memory, called the aggressor row, is compared to addresses stored in a content addressable memory (CAM). If the address is not already stored in the CAM, it is stored, casting out another address if necessary, and a count based on an Others value is stored in the CAM with the address. If the address is already stored in the CAM, its associated count is incremented. If a count associated with an address exceeds a threshold based on a maximum activation count, another portion of memory, such as a victim row of memory adjacent to the aggressor row of memory, is refreshed, and the count reset.
US09431082B2
A magneto-electronic component, having one or more elongate elements of a magnetic material, electrically conductive contacts, at least one insulating thin layer, on which the one or more elongate elements of the magnetic material and the electrically conductive contacts are arranged, and an additional insulating thin layer structured and arranged to cover at least the one or more elongate elements and partially cover the electrically conductive contacts to form an arrangement. At least the one or more elongate elements is connected to the contacts and the contacts are connectable to a current source in an electrically conducting manner. The arrangement is jointly rolled-up to form a rolled-up arrangement having a rolled-up region. At least the electrically conductive contacts are partially located outside the rolled-up region of the rolled-up arrangement.
US09431075B2
A memory macro comprises a plurality of memory array segments, each having a predetermined number of data inputs and outputs. A segment decoder circuit is configured to: receive a first value indicating a number of memory partitions among which the memory array segments are to be divided, and output a plurality of signals for selectively activating one or more of the plurality of memory array segments to be accessed based on the first value. A plurality of output drivers are coupled to the segment decoder circuit and to respective ones of the outputs. The plurality of output drivers are configured to selectively output data from the respective outputs of each of the respective activated memory array segments.
US09431074B2
A shiftable memory supporting bimodal data storage includes a memory having built-in shifting capability to shift a contiguous subset of data stored in the memory from a first location to a second location within the memory. The shiftable memory further includes a bimodal data storage operator to operate on a data structure comprising the contiguous subset of data words and to provide in-place insertion of a data value using the built-in shifting capability.
US09431062B2
A word line driving method is for a nonvolatile memory device including a plurality of memory blocks having a plurality of strings which is formed in a direction perpendicular to a substrate and connected between bit lines and a common source line. The method includes applying an offset pulse to a word line for a predetermined time to shorten a word line setting time, and applying a target pulse having a level which is higher or lower than a level of the offset pulse to the word line after the predetermined time.
US09431055B2
A method includes a processing module receiving data to store and determining error coding dispersal storage function parameters based on an error profile of one or more hard drives. The method continues with the processing module encoding at least a portion of the data in accordance with the error coding dispersal storage function parameters to produce a set of data slices. The method continues with the processing module defining addressable storage sectors within the one or more hard drives based on a number of data slices within the set of data slices to produce a set of addressable storage sectors. The method continues with the processing module storing data slices of the set of data slices in corresponding addressable storage sectors of the set of addressable storage sectors.
US09431046B2
A perpendicular magnetic recording (PMR) disk has a patterned template layer for the growth of the magnetic grains and the nonmagnetic material surrounding the grains. The template layer is a substantially planar platinum (Pt) or palladium (Pd) layer that is patterned to have Pt or Pd regions arranged in a hexagonal-close-packed (hcp) pattern with the Pt or Pd regions surrounded by Pt-oxide or Pd-oxide regions. The two separate regions of the template layer have different surface chemistries and energies, which provide a “chemical contrast” to impinging atoms during deposition of the metallic magnetic material and nonmagnetic (typically oxide) material, effectively guiding the deposition. The metallic magnetic material is preferentially deposited on the pristine, epitaxial Pt or Pd regions to form the magnetic grains, while the oxide migrates to the oxidized Pt or Pd regions due to the matching of lower surface energy.
US09431036B2
Thermal energy is generated within an optical NFT when in operation within a HAMR head. A heat-sink assembly within the HAMR head extracts thermal energy from the optical NFT and transmits the thermal energy via convection to air surrounding the HAMR head, radiation to surfaces adjacent to the HAMR head, and/or conduction to other parts of the HAMR head. The thermal energy generated within the optical NFT is conducted to the heat-sink. An air-bearing surface of the heat-sink convectively transfers at least some of the thermal energy to air passing between the air-bearing surface and a surface of an adjacent magnetic medium. Further, some of the thermal energy may also radiatively transfer from the air-bearing surface to the magnetic medium.
US09431032B1
A method and system provide a magnetic transducer including first and second read sensors, a shield and a conductive via. The shield is between the first and second read sensors. The magnetic transducer also includes first and second read shields. The shield has a top surface and a bottom surface opposite to the top surface. The bottom surface faces the first read sensor. The conductive via is isolated from the first read shield and the second read shield. The conductive via provides electrical contact to the shield and is electrically connected to the bottom surface of the shield.
US09431031B1
A method and system provide a magnetic transducer having an air-bearing surface (ABS). The method includes providing a first shield, a first read sensor, an antiferromagnetically coupled (AFC) shield that includes an antiferromagnet, a second read sensor and a second shield. The read sensors are between the first and second shields. The AFC shield is between the read sensors. An optional anneal for the first shield is in a magnetic field at a first angle from the ABS. Anneals for the first and second read sensors are in magnetic fields in desired first and second read sensor bias directions. The AFC shield anneal is in a magnetic field at a third angle from the ABS. The second shield anneal is in a magnetic field at a fifth angle from the ABS. The fifth angle is selected based on a thickness and a desired AFC shield bias direction for the antiferromagnet.
US09431019B2
An apparatus for generating a decorrelated signal including a transient separator, a transient decorrelator, a second decorrelator, a combining unit and a mixer, wherein the transient separator is adapted to separate an input signal into a first signal component and into a second signal component such that the first signal component includes transient signal portions of the input signal and such that the second signal component includes non-transient signal portions of the input signal. The combining unit and the mixer are arranged so that a decorrelated signal from a combination unit is fed into the mixer as an input signal.
US09431011B2
Systems, computer-implemented methods, and tangible computer-readable media for generating a pronunciation model. The method includes identifying a generic model of speech composed of phonemes, identifying a family of interchangeable phonemic alternatives for a phoneme in the generic model of speech, labeling the family of interchangeable phonemic alternatives as referring to the same phoneme, and generating a pronunciation model which substitutes each family for each respective phoneme. In one aspect, the generic model of speech is a vocal tract length normalized acoustic model. Interchangeable phonemic alternatives can represent a same phoneme for different dialectal classes. An interchangeable phonemic alternative can include a string of phonemes.
US09430999B2
A noise cancellation signal is generated by generating an ambient noise signal, representing ambient noise, and generating a noise cancellation signal, by applying the ambient noise signal to an feedforward filter, where the feedforward filter comprises a high-pass filter having an adjustable cut-off frequency, and by applying a controllable gain. The noise cancellation signal is then applied to a loudspeaker, to generate a sound to at least partially cancel the ambient noise. An error signal is generated, representing unwanted sound in the region of the loudspeaker. The phase of the ambient noise signal is compared to a phase of the error signal, and the gain is controlled on the basis of a result of the comparison, taking account of a phase shift introduced by the high-pass filter when performing the comparison.
US09430990B2
A system and a computer program product for displaying data in a graphical overlay. The method includes overlaying a first lens, including a first dataset, on a first region of the graphical overlay while a second lens, including a second dataset, overlaps the first lens. The first and second datasets are simultaneously displayed, and a correlation between the datasets is determined. Separation of the first and second lenses preserves a circumscribed region within each lens. The first dataset corresponds to first orientation position of the first lens. Rotation of the first lens to a second orientation position reconfigures the first dataset to provide a modified first dataset which corresponds to the second position. A rotational position may also be associated with points in time, a first position corresponding to a first point in time and the first dataset representing the first dataset at the first point in time.
US09430983B2
A system and method are disclosed to control the power consumption of column drivers in a display system. A video input signal is received which has an active video period and a vertical blanking period between frames. A timing controller transmits a first video frame to a column driver. The timing controller transmits a column driver disable command during a vertical blanking period. Prior to the subsequent active video period, the timing controller transmits a column driver enable command. The timing controller proceeds to transmit a second video frame to the column driver. In one embodiment, the timing controller determines whether to disable and enable the column driver based on a refresh rate, the refresh rate calculated by the timing controller from the video input signal.
US09430982B2
A display apparatus is disclosed. In one aspect, the apparatus includes a display panel including pixels connected to gate lines and data lines, a gate driver driving the gate lines, a data driver driving the data lines, and a control circuit controlling the gate driver and the data driver to display an image on the display panel. The control circuit applies a common voltage to the display panel. The control circuit compares the common voltage applied to the display panel and a feedback common voltage fedback from the display panel and applies a gate-on voltage having a voltage level corresponding to the compared result to the gate driver.
US09430971B2
An electro-optical unit includes pixels provided correspondingly to portions where a plurality of pairs of data lines and a plurality of gate lines intersect with each other. Each of the pixels has an electro-optical device and a pixel circuit. The pixel circuit has a holding circuit connected with one of the plurality of pairs of data lines and one of the plurality of gate lines, and a selection circuit connected with an output of the holding circuit and the electro-optical device. The holding circuit is capable of sampling and holding a first image signal to be applied to one of the pair of the data lines, while sampling and holding a second image signal to be applied to the other of the pair of the data lines. The selection circuit is capable of outputting the first image signal and the second image signal to the electro-optical device selectively.
US09430968B2
There is realized a display device capable of compensating for a deterioration of a circuit element while suppressing an increase of a circuit scale. One horizontal scanning period for a monitor row is composed of: a detection preparation period where preparation for detecting TFT characteristics and OLED characteristics is performed in the monitor row; a TFT characteristic detection period where current measurement for detecting the TFT characteristics is performed; an OLED characteristic detection period where current measurement for detecting the OLED characteristics is performed; and a light emission preparation period where preparation for allowing an organic EL element to emit light is performed in the monitor row. Data lines are used not only as signal lines that transfer a signal for allowing an organic EL element in each pixel circuit to emit light at desired brightness, but also as characteristic detecting signal lines.
US09430963B2
A display device integrated with a touch screen panel, and a method of driving the same, can prevent parasitic capacitance that would otherwise increase the load during a touch operation, lower the accuracy of touch sensing, or make touch sensing impossible. The display device includes data lines, gate lines, and a plurality of electrodes spaced apart from each other. A common voltage is applied to the electrodes in a display driving mode and a touch drive signal is applied to one or more of the electrodes in a touch driving mode. A data voltage is applied to the data lines in the display driving mode. A scan signal is supplied sequentially to the gate lines in the display driving mode and the touch drive signal or a signal corresponding to the touch drive signal is applied to one or more of the gate lines in the touch driving mode.
US09430962B2
A method and a device for setting parameters of a display panel are provided. The method includes: a first brightness value and a first parameter of a first color component, a second parameter corresponding a second color component, a third parameter corresponding a third color component, and a fourth parameter corresponding a white component are calculated according to a predetermined display information; and the first, second, third, and fourth parameters are inputted into the display panel. The difficulty of setting the parameters of the display panel can be decreased.
US09430956B2
A seam allowance guide aide label, Sewing with Color Label, to be applied to the surface of a sewing machine plate, as a stick-on label. The label has imprinted vertical and horizontal lines with colors; the first vertical line is the guideline to align the label to the default needle position for applying the label to the sewing machine's plate. The use of colors is a system to represent a standard measurement, known and accepted in today's sewing industry. The color system defines and establishes immediate differences between measurements, to achieve accuracy in positioning the edge of a textile to be sewn in a specific seam line without trouble of not recognizing numerical representations or seam grading lines in the actual plate of a sewing machine, either in imperial or metric system.
US09430955B2
This invention relates generally to breastfeeding training and more specifically to devices comprised of a doll and chest piece used for breastfeeding training.
US09430953B2
A simulation device imparts a force corresponding to a simulated event on a user. The simulation device includes a motion base mounted to a moveable surface and a capsule mounted to the motion base. The user is positioned within the capsule during the simulated event, and the motion base is configured to move the capsule relative to the moveable surface. The simulation device further includes a sensor that senses movement of the moveable surface. A controller is operably coupled to both the sensor and the motion base. The controller receives a signal from the sensor and controls the motion base to move the capsule according to the simulated event and the signal received from the sensor.
US09430952B2
A mechanism is provided in a data processing system for determining comprehensiveness of a question paper given a syllabus of topics. An answer and evidence generator of a question answering system executing on the data processing system finds one or more answers based on the syllabus of topics for each question in the question paper. The answer and evidence generator identifies evidence for the one or more answers in the syllabus for each question in the question paper. A concept identifier of the question answering system identifies a set of concepts in the syllabus corresponding to the evidence for each question in the question paper to form a plurality of sets of concepts. The mechanism determines a value for a comprehensiveness metric for the question paper with respect to the syllabus of topics based on the plurality of sets of concepts.
US09430950B2
A plurality of transportation vehicles travel with power from an energy storage member along a predetermined travel route under control of a ground controller. A charging area having charging equipment for charging the energy storage member of the transportation vehicle is provided in the travel route, and the transportation vehicles report a position and remaining capacity of the energy storage member to the ground controller. The ground controller controls a transportation vehicle having remaining capacity of a threshold value or less to travel to the charging area for charging the energy storage member, and controls transportation vehicles in the charging area to travel to positions outside the charging area in accordance with transportation requests.
US09430947B2
Technology for determining a point-to-point separation between a first ship (e.g., guide ship) and a second ship (e.g., following ship) is disclosed. One approach can include maritime autonomous station keeping (MASK) interactive device comprising a communication module and a processor. The communication module can be configured to receive a following ship reference point (SRP) generated by at least one differential global positioning system (DGPS) receiver on a following ship relative to a guide SRP generated by at least one DGPS receiver on a guide ship. The processor can be configured to generate a plurality of fixed following reference edge points (REPs) relative to the following SRP representing a following ship hull, generate a plurality of fixed guide REPs relative to the guide SRP representing a guide ship hull, and monitor a plurality of distances between the plurality of following REPs and the plurality of guide REPs.
US09430945B2
A system for mounting in a vehicle and for providing route information calculated by a remote source (116) to a display is provided. The system includes a display interface (124) for providing a signal to the display (108). The system further includes a communications device (120). The system yet further includes a processor (122) operatively coupled to the communications device (120) and the display interface (124), wherein the processor (122) is configured to cause vehicle position information to be sent to the remote source (116) via the communications device (120). The processor is further configured to receive route information from the remote source (116) via the communications device (120). The processor (122) is yet further configured to provide a representation of the route information to the display interface (124), the route information conveying directions from a position of the vehicle to a destination.
US09430944B2
Methods and systems are disclosed for participative sensing of events and conditions by road vehicles, collection of this data from a large number of road vehicles by a central server, processing the data to identify events and conditions which may be of interest to other vehicles in a particular location, and sending notifications of the events and conditions to vehicles. A large number of vehicles use participative sensing systems to identify a safety-related event or condition which should be reported to the central server—such as a large pothole, an obstacle in the roadway, an icy road surface, a traffic accident, etc. The central server stores and aggregates the data, filters it and ages it. Vehicles requesting advisories from the central server will receive notices of safety-related events and conditions based on their location and heading. Driver warnings can be issued, and vehicle systems may respond to the notices.
US09430928B2
A power tool system includes a plurality of tool devices. Each of the tool devices includes a condition detection unit that detects condition information of the tool device and a communication unit capable of performing bidirectional wireless communication with a further one of the tool devices. The communication unit is configured to obtain the condition information of the tool device from the condition detection unit and transmit the obtained condition information of the tool device to the further one of the tool devices.
US09430927B2
An environmental detection sound system includes a wireless communications unit, a system chip wirelessly communicating to an external operation device; an audio compilation unit, an output unit, a detector module and a data processing unit; wherein the system chip receives a control signal and a sound source signal, converts the sound source signal to a programming audio signal and then outputs the programming audio signal; the audio compilation unit receives the programming audio signal, converts the programming audio signal to an audio signal, and then outputs the audio signal; the output unit receives and plays back the audio signal; the detector module detects an environment and outputs a detection value; the data processing unit receives the detection value and produces a warning audio and a warning message to remind listeners to timely improve environmental conditions when the detection value exceeds a standard value, so as to maintain safety and health.
US09430921B2
A vibration module for applying vibrational tractions to a wearer's skin is presented. Use of the vibration module in headphones is illustrated for providing tactile sensations of low frequency for music, for massage, and for electrical recording and stimulation of the wearer. Damped, planar, electromagnetically-actuated vibration modules of the moving magnet type are presented in theory and reduced to practice, and shown to provide a substantially uniform frequency response over the range 40-200 Hz with a minimum of unwanted audio.
US09430906B2
According to one aspect of the present invention, a method of conducting a wagering game on a gaming system includes receiving a wager in response to an input via at least one input device. The method also includes displaying, on at least one display device, a randomly selected outcome of a wagering game in a display area. The display area includes a plurality of reels with a plurality of symbols forming an array. The plurality of symbols includes at least one special symbol. In response to the randomly selected outcome including a special symbol on adjacent ones of the plurality of reels, the method includes changing the functionality of the special symbols on the adjacent ones of the plurality of reels to create a modified array.
US09430898B2
Embodiments of the present invention are directed to gaming devices that provide audio-visual animated characters in response to game play. The character has a personality that may be encouraging, taunting or another quality. A plurality of expressions of the personality is presented, between one extreme and another, dependant upon the history of game outcomes.
US09430893B1
Currency processing systems, coin processing machines, computer-readable storage media, and methods of managing processed coins are presented herein. A method is presented for managing coins processed by a currency processing system. The method includes: receiving a batch of coins by the currency processing system; feeding the coins into a coin processing unit which includes one or more coin discriminating sensors; sorting the batch of coins into genuine fit target coins and reject coins; sorting the reject coins into a plurality of reject groups, each of which corresponds to a respective category of rejected coins; analyzing at least one of the reject groups to determine if any genuine target coins were mischaracterized and erroneously sorted into that reject group; and, crediting a user of the currency processing system for any genuine target coins in the reject group determined to have been mischaracterized and erroneously sorted.
US09430889B2
Method for improving the security of communication between the electronic key and vehicle to prevent interception by a third-party item of electronic equipment by highlighting in such event, a time delay in acknowledgement of this signal by the key. This method includes, before authorizing the access to and/or starting of the vehicle, additional steps of adapting the amplitude of a coded identification request signal received by the key to reach the detection threshold of the key as soon as possible; measuring the sum of the duration of the emission of the coded interrogation signal and of the duration of the response signal of the electronic key; comparing the sum of the measured durations to a reference duration, and triggering an alarm relating to the conditions of access to and/or starting of the vehicle when the separation between this sum of durations and the reference duration is above a preset threshold.
US09430883B2
A device may store and transmit data collected from sensors within a vehicle. The device may include at least one communication interface; a memory configured to store instructions; and a processor, coupled to the at least one communication interface and the memory. The processor may be configured to execute the instructions stored in the memory. The instructions may cause the processor to receive an initiation signal from an on-board interface associated with a vehicle, establish communications with the on-board interface and at least one vehicle sensor in response to the initiation signal, receive a first data stream from the at least one vehicle sensor, generate a second data stream from the least one internal sensor, combine the first data stream and the second data stream into a combined stream, store the combined stream in the memory, and wirelessly transmit the combined stream to a remote storage and retrieval system.
US09430881B2
A system comprising a measurement device and a handheld device is disclosed, the system adapted to withstand, detect, record, and display heat cycle event counts. The measurement device comprises a sensor for measuring and a heat cycle detection unit. The heat cycle detection unit comprises a temperature or pressure responsive element, a detection module, data interface, and data memory. The handheld device comprises a screen, a button, a communication circuit, and a processing system. The communication circuit is configured to communicate with the measurement device and a computing device and the processing system is configured to receive non-measurement information from the measurement device, display the received information on the screen, and cycle the received information displayed on the screen based on an actuation of the button, wherein the handheld device is used to display a heat sterilization cycle count of the measurement device.
US09430874B2
Objects within two-dimensional video data are modeled by three-dimensional models as a function of object type and motion through manually calibrating a two-dimensional image to the three spatial dimensions of a three-dimensional modeling cube. Calibrated three-dimensional locations of an object in motion in the two-dimensional image field of view of a video data input are determined and used to determine a heading direction of the object as a function of the camera calibration and determined movement between the determined three-dimensional locations. The two-dimensional object image is replaced in the video data input with an object-type three-dimensional polygonal model having a projected bounding box that best matches a bounding box of an image blob, the model oriented in the determined heading direction. The bounding box of the replacing model is then scaled to fit the object image blob bounding box, and rendered with extracted image features.
US09430873B2
A slice data generation device generates slice data representing a cross-section obtained as a result of cutting a three-dimensional model and includes a reading section that reads information on a polygon mesh, a change section that changes phase information on the read polygon mesh such that a contour polyline that represents a contour obtained as a result of slicing the polygon mesh read by the reading section into round slices is capable of being acquired, a correction section that acquires the contour polyline from the polygon mesh, the phase information on which has been changed by the change section, and corrects the acquired contour polyline such that an area inside the acquired contour polyline is capable of being painted out; and a paint-out data generation section that paints out the area inside the contour polyline corrected by the correction section.
US09430869B1
The subject matter of this specification can be embodied in, among other things, a method that includes generating intermediate values from an evaluation of one or more static expressions within shader programming code that is configured to modify an appearance of an image, compressing the intermediate values based on a determination of which intermediate values are duplicative, and storing the compressed intermediate values in a buffer accessible to an image rendering application.
US09430857B2
Systems and methods for determining and displaying reserve estimates for a reservoir by generating a table and, optionally, a report and/or a graph for the reserve estimates and predefined identification properties that uniquely describe the reserve estimates.
US09430853B2
An interactive computer program for augmenting an image to include reified emotion information. The program implements the steps of: displaying an unreified image; prompting a user to identify an emotion associated with the image; prompting the user to select a color corresponding to the identified emotion; prompting the user to select a location within the image for applying the selected color; applying the selected color to the selected location within the image; and displaying the reified image.
US09430852B2
Apparatus and methods are provided for viewing a check image and selecting a check service to be applied to a check. Check services may include a pay/return decision. The check images may be presented in a carousel view without pop-up windows. The user may import pre-selected check services such as stop payments. Check images may be marked with a status indicator. The status indicator may correspond to a check service applied to the check or a reconciliation error associated with the check. A user may receive notifications of pending expiration of an applied check service. The user may select and apply a check service at any time during a clearing process of the check. User may search for checks and check images based on the check service applied to the check. Search results may include check images and may be transmitted to a requested location such as via e-mail.
US09430837B2
A position and orientation measurement apparatus for measuring the position and orientation of a target object includes a first search unit which searches a geometric model for a lost model region corresponding to a lost image region in a range image, a determination unit which determines whether or not a point on a geometric model corresponding to a pixel on the range image of the target object falls within the lost model region, a correction unit which corrects combinations of pixels on the range image and corresponding points which are determined to fall within the lost model region, and a calculation unit which calculates the position and orientation of the target object based on the corrected combinations of the pixels on the range image and points on the geometric model.
US09430835B2
An identification code-based three-dimensional interactive technique includes acquiring an image including an identification-coded real object, the image being taken by video-capable equipment, identifying an identification code from the identification-coded real object, obtaining object information corresponding to the identification code, acquiring a reference image associated with the identification code and feature points of the reference image, obtaining a position, an orientation, or a combination thereof on the video-capable equipment relative to the identification-coded real object based on the reference image and the feature points of the reference image, and conducting a three-dimensional interaction based on the position, the orientation, or a combination thereof of the video-capable equipment relative to the identification-coded real object and the object information corresponding to the identification code.
US09430831B2
A system (106) visualizing an image registration mapping in an intuitive interactive manner. The system (106) includes a display (110) and one or more processors (116). The processors (116) are programmed to receive a first image and a second image and obtain an image registration mapping from the first image to the second image. Even more, the processors (116) are programmed to display the first image adjacent to the second image on the display (110) and obtain one or more reference image locations. Each of the reference image locations is defined in the coordinate frame of one of the first image and the second image. Moreover, the processors (116) are programmed to highlight each of the reference image locations on the one of the first image and the second image and highlight a correlated image location for each of the reference image locations in the other one of the first image and the second image. The correlated image locations are determined using the image registration mapping.
US09430830B2
Methods, apparatus, and other embodiments associated with objectively predicting disease aggressiveness using Spatially Aware Cell Cluster (SpACCl) graphs. One example apparatus includes a set of logics that acquires an image of a region of tissue, partitions the image into a stromal compartment and an epithelial compartment, identifies cluster nodes within the compartments, constructs a spatially aware stromal sub-graph and a spatially aware epithelial sub-graph based on the cluster nodes and a probabilistic decaying function of the distance between cluster nodes, extracts local features from the sub-graphs, and predicts the aggressiveness of a disease in the region of tissue based on the sub-graphs and the extracted features. Example methods and apparatus may employ a Support Vector Machine classifier to classify super-pixels within the image as stromal super-pixels or epithelial super-pixels.
US09430827B2
A method is disclosed for segmentation of a calcified blood vessel in image data. An embodiment of the method includes providing a vesseltree representation of the blood vessel; providing a number of preliminary boundary representations of a number of cross-sections of the blood vessel; providing a number of intensity profiles in the image data in the number of cross-sections; determining a calcification in the cross-section based on the intensity profile; and correcting each preliminary boundary representation into a corrected boundary representation which excludes the calcification from an inner part of the blood vessel. A segmentation system is also disclosed.
US09430816B2
Disclosed is an image processing method including: generating an initial denoised image with a reduced noise while preserving an edge in an input image; controlling an iterative operation performed based on energy defined in advance based on an initial residual component calculated from the input image and the initial denoised image; and separating the initial denoised image to a skeleton component and a residual component by the controlled iterative operation to generate the skeleton component as an output image.
US09430810B2
A drawing method, apparatus, and terminal, where: a drawing command set of a current frame is received; a CPU drawing time and a GPU drawing time of the current frame are determined according to the drawing command set of the current frame; and if the CPU drawing time is less than the GPU drawing time, the CPU is used to draw the current frame, and if the CPU drawing time is longer than the GPU drawing time, the GPU is used to draw the current frame. In this way, which drawing manner is adopted is dynamically determined according to the drawing time corresponding to the CPU/GPU, so as to shorten a drawing time of each frame to some extent, thereby increasing a display speed of a system and improving display performance.
US09430805B2
A system for delivering medical examination, diagnosis, and treatment services includes a plurality of health care practitioner terminals, each having a display device, a plurality of patient terminals in audiovisual communication with any of the health care practitioner terminals, a call center, in communication with the patient terminals and the health care practitioner terminals, routing a call from a patient at one of the patient terminals to an available health care practitioner at one of the health care practitioner terminals, so that the available health care practitioner may carry on a two-way conversation with the patient and visually observe the patient, and a protocol database containing a plurality of protocol segments such that a relevant segment of the protocol may be displayed in real time on the display device of the health care practitioner terminal for use by the available health care practitioner in making an assessment of the patient.
US09430804B2
The economical load distribution adjusting device 10 acquires an optimal hydroelectric output, optimal demand, and optimal power price from the supply-demand planning device 23, acquires the planned hydroelectric output planned by the water level planning devices 21, and acquires a planned demand planned by the charge control devices 22. The economical load distribution adjusting device 10 reduces the power price of the time at which the planned hydroelectric output exceeds the optimal output and makes the water level planning devices 21 replan the hydroelectric output, and raises the power price of the time at which the planned demand exceeds the optimal demand and makes the charge control devices 22 replan the amount of demand.
US09430801B2
Requirements, principles or guidelines of an accounting standard such as Generally Accepted Accounting Principles (GAAP) are transformed or codified into rules that specify how form, content and/or style of a certain portion of a financial statement, such as a header, should be configured while complying with the accounting standard. A rule engine compares attributes related to a financial statement and rules to determine which rule applies, and a selected rule specifies a header configuration. Relevant data received or retrieved from a source is used to generate or populate the header such that the header is automatically generated while complying with the accounting standard.
US09430800B2
The subject matter discloses a method for trade interaction chain reconstruction comprising: identifying a swap deal, the swap deal includes two or more of the received interactions and involves two or more participants; selecting a first interaction of the received interactions, said first interaction involves at least two participants of the two or more participants, said first interaction is stored on a computerized device; obtaining a first plurality of interactions of the received interactions that involve the at least two participants of the two or more participants; determining a first plurality of relevance scores between the first plurality of interactions and the first interaction; and associating interactions of the first plurality of interactions to be relevant to the swap deal according to the determined first plurality of relevance scores.
US09430795B2
An information processing apparatus may include a control unit to control display of parts information of a plurality of items, to generate search information according to feedback from a user for the parts information, and to control display of a search result according to the search information.
US09430792B2
Methods, systems, computer-readable media, and apparatuses are presented for using cross-domain communication to allow manufacturers and other sellers to use cloud/Internet-based products catalog services without sacrificing the search-engine optimization benefit of catalog pages hosted within the manufacturer's domain. The Same Origin Policy used by many browsers may disallow direct communication to the manufacturer's domain for corporate web site and other functions, on the one hand, and an external domain for an efficiently hosted products catalog, on the other. Some embodiments present the use of the JSONP protocol for cross-domain retrieval of a Catalog Widget that is configured to retrieve product catalog information directly from the external domain. In these embodiments, search-engine optimization is furthered by the efficient production of numerous catalog pages that originate from the external domain yet appear to users and search engine crawlers to be within the manufacturer's domain.
US09430788B2
A robotic retail wall is presented allowing for the dispensing of merchandise within a retail location. The robotic wall includes commodity products and robotics that pick and deliver products to consumers in response to input at a kiosk. The robotics and products are separated from a retail space by a transparent barrier, allowing consumers in the retail space to view the actions of the robotics in retrieving a product. Behind the robotic wall is a product stocking area, where commodity products can be added to the robotic wall with assistance from the robotics.
US09430785B2
An advertiser submitting a sponsored ad to a provider can determine aspects of the ad, such as creative elements and bid price, based on a dynamic categorization of an item and/or landing page associated with the ad. An algorithm can be used that utilizes a browse tree for each item to be displayed to a user following a sponsored link, for example, and attempts to find a node in the browse tree that appears at the lowest level in the tree and with a sufficient appearance frequency. When consensus is reached for a node in the browse tree that meets these criteria, a corresponding categorization is determined, which can be used to determine appropriate aspects to be used for the sponsored ad, at least until enough information is obtained such that aspects can be determined independent of the categorization.
US09430784B1
Disclosed are a system and a method enabling E-Commerce transactions without redirecting a user's computer from one electronic publishing page to another electronic publishing page.
US09430781B1
A network based indoor positioning and geofencing system and method is described. Beacons are disposed within a physical premises and each beacon transmits a signal containing identifying information. A networked indoor positioning module receives measured reference points that include a measured beacon identifier and a measured signal strength. The networked indoor positioning module uses the measured reference points to generate calculated signal strength values for at least one detected beacon. At least one geofence is associated with the physical premises and the geofence includes some of the calculated signal strength values. A wireless device receives a beacon identifier and a beacon signal strength, when the wireless device is in or near a geofence associated the physical premises. The networked indoor positioning module determines that the wireless device is within at least one geofence by comparing the received beacon identifier and the received beacon signal strength with the calculated signal strength values corresponding to the detected beacon.
US09430771B2
A system verifying an item in a package comprises a package producer and a verifier. The package producer produces a package with a label, wherein the package includes an item each with one or more selected tag identifiers that are placed in a location on the item. The verifier verifies the item using 1) the one or more selected tag identifiers as detected using a spectral measurement or 2) a location or a shape of the one or more selected tag identifiers on the item, and 3) the label as read using a label reader.
US09430770B2
A computerized method for generating a time-limited number for use in a payment card transaction involving a payment card issued by a financial institution. The payment card comprises an original payment card number. A first plurality of digits of the original payment card number is provided to a processor. The first plurality of digits are predetermined digits associated to the financial institution. A desired expiration date through which the time-limited number is valid for acceptance in the payment card transaction is provided to the processor. A program is executed by the processor to set a first plurality of digits in the time-limited number to the first plurality of digits in the original payment card number, generate a first number corresponding to the desired expiration date, set a second plurality of digits in the time-limited number to the first number, and output the time-limited number.
US09430765B2
An embodiment includes a credit card device capable of generating a programmed magnetic field of alternating polarity based on a speed of a card swipe, and methods for constructing the device for the purpose of emulating a standard credit card. An apparatus is described to allow said device to emulate behavior of a credit card when used in electronic credit card readers. Additionally methods are described to allow user control of said device for the purpose of authorizing or controlling use of said device in the application of credit, debit and cash transactions, including cryptocurrency and card-to-card transactions. Methods are also described for generating a limited-duration credit card number when performing a transaction for the purpose of creating a limited-use credit card number, which is limited in scope of use to a predetermined number of authorized transactions. Furthermore said device may interact with other similar devices in proximity for the purpose of funds or credit/debit transfers.
US09430761B2
Distribution of content stored on read only media, and a system and method by which a consumer who purchased content stored on read only media implements a process in the field by which they alter the storage media. A system and tools are used by the consumer to identify, authenticate, disable, and confirm alteration in exchange for compensation, the acquisition of new usage rights to content, or the ability to restore access to or copy content to new media. The process may be conducted by the consumer in the field without assistance and or visual inspection, or be partially conducted in conjunction with an authorized intermediary. Furthermore, the process may restore access to content stored on new media without the need to transfer copies of content.
US09430759B2
Various methods, apparatus, and systems are disclosed for calculating a fee linked to an online financial transaction, with improved flexibility and availability through caching and refreshing of fee calculation data. In one embodiment, a method includes extracting fee calculation data into a data cache associated with control data that is updated in response to refreshing of the data cache; receiving a fee calculation request linked to an online transaction associated with a fee type, a country code, and a client identifier; and then selecting, by looking up the data cache, a base fee from either a default fee determined by the fee type and the country code or from an overriding fee associated with the client identifier. The method further includes calculating a transaction fee for the online transaction based at least in part on the base fee; and verifying the control data to transmit the calculated transaction fee.
US09430749B2
An architectural planning system, that includes software and the process thereof, which actively tracks the relationship of organizational groups as well as the required connections therebetween, which information can be actively taken into account during an architectural planning phase. Generally, this provides an improved software tool and process for planning the physical locations of organizational groups within the building space. Further, changes in organizational needs can be readily modified and adapted through direct and dynamic collaboration between these parties.
US09430746B2
Usage data representing the access of a set of resources on a network is accessed. The usage data is based at least in part on information received from client systems sent as a result of beacon instructions included with the set of resources. First and second sets of usage data representing access by client systems classified as a first type and a second type, respectively, are determined based on the accessed usage data. Counts of unique visitors accessing the network resources from each of the first and second types of client systems, based on the first and sets of usage data, respectively, are each determined. A total count of unique visitors accessing the network resources from the first and second types of client systems is determined based on data representing the usage overlap of devices of the first type with devices of the second type.
US09430732B2
In embodiments of the present invention improved capabilities are described for a three-dimensional Radio Frequency Identification (RFID) tag structure with an opening though the structure.
US09430730B2
A payment card may include a read sensor configured to detect a reading of the payment card by a card reader. In particular, the payment card may include a controller or a processor configured to count a number of times the payment card is read by other card readers. The payment card may implement card security measures based on the number of reads detected by the read sensor. The payment card may further include a magnetic stripe emulator configured to emulate signal patterns of a magnetic stripe when the magnetic stripe is read by a card reader. The controller may disable the magnetic stripe emulator when the number of reads detected by the read sensor exceeds a predetermined number.
US09430729B2
In one embodiment, an RFID apparatus is provided, which includes an input circuit that has an input impedance used for receiving RF signals. An RF-signal converter provides an apparatus-operating power signal in response to receiving the RF signals. An impedance circuit provides and selects impedance values in response to at least one select signal provided by a state-machine logic circuit. The state-machine logic circuit provides the select signal(s) in response to the apparatus-operating power signal for selecting the impedance values and therein permit the input impedance to be changed for tuning the RFID apparatus.
US09430728B2
The electronic identification system provides two-way communications between reader and tags using alternating magnetic fields established by the reader and tag. Communication is accomplished by utilizing either a one-step or a two-step modulation process in which the information to be communicated either modulates an alternating magnetic field directly or modulates a periodic signal which modulates an alternating magnetic field. The coil in the reader that is used to establish an alternating magnetic field is transformer-coupled through capacitors to a push-pull driving circuit consisting of four field-effect transistors connected in a bridge arrangement. The coil, capacitors, and coupling circuitry are maintained in a tuned condition by continually adjusting either the driving frequency, the coil inductance, or the capacitor capacitance during communications. A tag utilizes a coil to couple with the reader's alternating magnetic field and a capacitor to resonate the coil, thereby extracting power from the field more efficiently. Transformer coupling of the coil and capacitor is utilized for improved impedance matching. The coil, capacitor, and coupling circuitry can be maintained in a tuned condition by continually adjusting either the coil inductance, or the capacitor capacitance during communications. Certain configurations of the system may require that tuning maintenance be discontinued during the transmission of data.
US09430726B2
A 2D color barcode layout is disclosed. The barcode includes a 2D array of data cells, four corner locators, and border reference cells forming four borders between the corner locators that substantially surround the array of data cells. Each data cell and border reference cell has one of four primary colors (e.g. CMYK). Most border reference cells have the same size as the data cells, except for yellow ones which are longer. The border reference cells form a repeating color sequence along the borders, and are used during decoding to calculate (1) the channel offset (a spatial offset) of each primary color at different locations along the borders and (2) the reference (average) color values of each primary color. During decoding, the color values of each data cell is measured while taking into account channel offset which is calculated by interpolating the channel offset of the border reference cells.
US09430723B1
The present disclosure is directed to a method for managing printing device software. The method includes receiving, at a computing device, a request to print a document file. The method also includes receiving a selection of a particular printing device with which to print the document file. The method further includes performing a search operation to determine whether a printer driver for the particular printing device is stored on the first computing device. Additionally, the method includes causing a data transfer of the printer driver from a server onto the first computing device over a wide area network upon determining that the printer driver is not stored on the computing device. Further, the method includes converting, using the printer driver, the document file into a print job. The method also includes transmitting, to the particular printing device, instructions to execute the print job.
US09430721B2
A system includes a printer including a plurality of functional modules and a controller configured to control the print process, a storage device configured to store information regarding supporting an operator to interact with a functional module of the plurality of functional modules other than the local user interface of the printer, a presence detection system configured to detect a presence of an operator near or at the functional module, and an information presentation device configured to present information within a perception reach of the operator. The system includes a computer device connected to the presence detection system, the storage device, the printer and the information presentation device. The computer device is configured to retrieve, upon detection of a presence of an operator near or at the functional module by the presence detection system, status information of the status of the functional module of the printer from the controller and support information regarding supporting an operator to interact with the functional module from the storage device, and to select part of the support information taking into account the status information, and to provide the selected information to the information presentation device in order to present the selected information to the operator within the perception reach of the operator.
US09430715B1
Methods and systems for detection and removal of cast shadows from an image. In particular, one or more embodiments compute correspondences between image patches in the image using a grid-based patch-matching algorithm. One or more embodiments then train a regression model to detect shadows from the computed patch correspondences. One or more embodiments then segment the detected shadows into shadow regions and identify cast shadows from the shadow regions. Once the cast shadows are identified, one or more embodiments use patch-based synthesis of pixels guided by a direct inversion of the image. Optionally, one or more methods can use pixels from the synthesized image and the naïve inversion of the image, based on a synthesis confidence of each pixel, to produce a combined result.
US09430705B2
There is provided an information processing apparatus including a face image acquisition section which acquires face images extracted from images which are classified into an identical time cluster by performing time clustering, and a person information generation section which classifies the face images for each time cluster, and generates person information in which persons regarded as an identical person are identified based on the face images which are classified.
US09430694B2
A face recognition method is provided. The method includes dividing an input video into different sets of frames and detecting faces of each frame in the input video. The method also includes generating face tracks for the whole video. Further, the method includes applying a robust collaborative representation-based classifier to recover a clean image from complex occlusions and corruptions for a face test sample and perform classification. In addition, the method also includes outputting the video containing the recognized face images.