公开(公告)号：US11070181B2

公开(公告)日：2021-07-20

申请号：US16432536

申请日：2019-06-05

申请人： MACRONIX INTERNATIONAL CO., LTD.

发明人： Yih-Shan Yang

IPC分类号： H03F3/26 ,  H03F3/45 ,  H03K3/356 ,  H03K3/26

摘要： A voltage driver circuit for an output stage of an operational amplifier, or other circuits, includes a level shifter and an output driver including a source follower and a common source amplifier in a push-pull configuration. The level shifter generates a node voltage as a function of an input voltage on the input node. The output driver including a first transistor having a control terminal receiving the node voltage, and connected between a supply voltage and an output node, and a second transistor having a control terminal receiving the input voltage from the input node, and connected between the output node and a reference voltage, wherein the first and second transistors have a common conductivity type.

公开(公告)号：US10886901B1

公开(公告)日：2021-01-05

申请号：US16791009

申请日：2020-02-14

申请人： Realtek Semiconductor Corp.

发明人： Chia-Liang (Leon) Lin

IPC分类号： H03K3/03 ,  H03K3/011 ,  H03K19/0948 ,  H03K3/26

摘要： A circuit includes multiple stages cascaded in a ring topology such that each stage has a preceding stage, a succeeding stage, an alternate-preceding stage, and an alternate-succeeding stage. Each stage includes a MOS transistor of a first type, a MOS transistor of a second type and a resistor. The MOS transistor of a first type receives a first input that is output from the preceding stage, and outputs a second output to the alternate-preceding stage. The MOS transistor of a second type receives a second input that is output from the alternate-succeeding stage, and outputs a first output to the succeeding stage. The resistor provides coupling and level-shifting between the first output and the second output.

公开(公告)号：US09385649B2

公开(公告)日：2016-07-05

申请号：US14290665

申请日：2014-05-29

申请人： QUALCOMM INCORPORATED

发明人： Le Wang ,  Arash Mehrabi

IPC分类号： H03K3/26 ,  H03B5/04 ,  H03B5/20 ,  H04B5/04 ,  H03K3/30 ,  H03K3/0231 ,  H03K4/50

CPC分类号： H03B5/04 ,  H03B5/20 ,  H03K3/0231 ,  H03K3/30 ,  H03K4/50 ,  H04B5/04

摘要： Cancelling a delay in a comparator of an RC oscillator configured to generate a clock pulse, including: selectively coupling a plurality of current sources to a first capacitor, a second capacitor, and a resistor, wherein the plurality of current source charge and discharge the first capacitor and the second capacitor, and charge the resistor; charging the first capacitor at a higher rate during a first phase of the clock pulse than a second phase of the clock pulse, and charging the second capacitor at a higher rate during a third phase of the clock pulse than a fourth phase of the clock pulse; and generating the clock pulse by enabling the comparator to compare a voltage on the first or second capacitor with a voltage on the resistor.

摘要翻译： 取消被配置为产生时钟脉冲的RC振荡器的比较器中的延迟，包括：选择性地将多个电流源耦合到第一电容器，第二电容器和电阻器，其中所述多个电流源对第一 电容器和第二电容器，并对电阻充电; 在时钟脉冲的第一相位期间以比时钟脉冲的第二相位更高的速率对第一电容器充电，并且在时钟脉冲的第三相位期间以比时钟脉冲的第四相位更高的速率对第二电容器充电 ; 并通过使比较器将第一或第二电容器上的电压与电阻器上的电压进行比较来产生时钟脉冲。

公开(公告)号：US20160126935A1

公开(公告)日：2016-05-05

申请号：US14531541

申请日：2014-11-03

申请人： Stefan MARINCA

发明人： Stefan MARINCA

IPC分类号： H03K3/011 ,  H03K3/26

CPC分类号： G05F3/30

摘要： Early effects are intrinsically present in bipolar junction transistors (BJTs). Described are examples of complimentary to absolute temperature (CTAT) and proportional to absolute temperature (PTAT) cells that reduce errors associated with the Early effects that would otherwise be present.

摘要翻译： 早期效应本质上存在于双极结晶体管（BJT）中。 描述的是互补绝对温度（CTAT）和与绝对温度（PTAT）电池成比例的示例，其减少与否将存在的早期效应相关联的误差。

公开(公告)号：US09148132B2

公开(公告)日：2015-09-29

申请号：US13967509

申请日：2013-08-15

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Yi-Tzu Chen

IPC分类号： H03K3/26 ,  H03B5/26 ,  H03K3/011 ,  H03K3/354 ,  H03K3/0231 ,  H03K4/12

CPC分类号： H03K3/26 ,  H03B5/26 ,  H03K3/011 ,  H03K3/0231 ,  H03K3/354 ,  H03K4/12

摘要： A method of providing an oscillating signal, comprising providing a first constant current flowing from a positive power supply node, the first constant current independent of a variation in a positive power supply node voltage, providing a second constant current flowing from a positive power supply node to a second electrode of a capacitor, a first electrode of the capacitor connected directly to the positive power supply node, the second constant current mirroring the first constant current and charging the capacitor by reducing a voltage across the capacitor. A third constant current is provided flowing from the positive power supply node through a first NMOS transistor and mirroring the first constant current, the first NMOS transistor having a gate connected directly to the second electrode of the capacitor and an oscillating signal generated by turning on the first NMOS transistor when the capacitor reaches a predetermined voltage level.

摘要翻译： 一种提供振荡信号的方法，包括提供从正电源节点流出的第一恒定电流，所述第一恒定电流独立于正电源节点电压的变化，提供从正电源节点流出的第二恒定电流 到电容器的第二电极，电容器的第一电极直接连接到正电源节点，第二恒定电流反映第一恒定电流，并且通过减小电容器两端的电压对电容器充电。 提供了从正电源节点通过第一NMOS晶体管流动并镜像第一恒定电流的第三恒定电流，第一NMOS晶体管具有直接连接到电容器的第二电极的栅极，以及通过接通 当电容器达到预定电压电平时，第一NMOS晶体管。

公开(公告)号：US20150200651A1

公开(公告)日：2015-07-16

申请号：US14154757

申请日：2014-01-14

申请人： ARM LIMITED

发明人： Anil Kumar BARATAM

IPC分类号： H03K3/012 ,  H03K3/3562 ,  H03K3/26

CPC分类号： H03K3/012 ,  H03K3/35625

摘要： A master-slave flip-flop circuit with a master latch and slave latch has clock generating circuitry which generates a gated clock signal based on the clock signal and a gating control signal. When the gating control signal has a first value, then the gated clock signal has a value dependent on the clock signal, while when the gating control signal has a second value then the gated clock signal has a fixed value independent of the clock signal. At least one component of the master-slave flip-flop circuit is controlled by the gated clock signal so that dynamic switching power can be reduced. The gating control signal is dependent on the input signal or a signal within the master latch and is independent of a slave signal in the slave latch and the output signal of the flip-flop.

摘要翻译： 具有主锁存器和从锁存器的主从触发器电路具有基于时钟信号和门控控制信号产生门控时钟信号的时钟发生电路。 当选通控制信号具有第一值时，门控时钟信号具有取决于时钟信号的值，而当门控控制信号具有第二值时，门控时钟信号具有与时钟信号无关的固定值。 主从触发器电路的至少一个组件由门控时钟信号控制，从而可以降低动态开关功率。 门控控制信号取决于输入信号或主锁存器内的信号，与从锁存器中的从属信号和触发器的输出信号无关。

公开(公告)号：US08902008B1

公开(公告)日：2014-12-02

申请号：US13548670

申请日：2012-07-13

申请人： Giuseppe De Vita ,  Alessandro Savo

发明人： Giuseppe De Vita ,  Alessandro Savo

IPC分类号： H03K3/26

CPC分类号： H03K4/502

摘要： Aspects of the disclosure provide a circuit. The circuit includes a current generator, a capacitor, a comparator, a switch and a clock generator logic. The current generator is configured to generate a current proportional to a comparator threshold voltage by a ratio. The capacitor is configured to be charged by the current to have a capacitor voltage. The comparator is configured to compare the capacitor voltage with the comparator threshold voltage. The switch is configured to discharge the capacitor based on the comparison. The clock generator logic is configured to generate a clock signal based on the comparison, such that a frequency of the clock signal is a function of the ratio and is independent of the current and the comparator threshold voltage.

摘要翻译： 本公开的方面提供电路。 电路包括电流发生器，电容器，比较器，开关和时钟发生器逻辑。 电流发生器被配置为产生与比较器阈值电压成正比的电流。 电容器被配置为由电流充电以具有电容器电压。 比较器配置为将电容器电压与比较器阈值电压进行比较。 开关被配置为基于比较来放电电容器。 时钟发生器逻辑被配置为基于比较产生时钟信号，使得时钟信号的频率是该比率的函数，并且与电流和比较器阈值电压无关。

公开(公告)号：US08653754B2

公开(公告)日：2014-02-18

申请号：US13008125

申请日：2011-01-18

申请人： Hiroki Kikuchi ,  Masao Yonemaru ,  Takashi Oki

发明人： Hiroki Kikuchi ,  Masao Yonemaru ,  Takashi Oki

IPC分类号： H05B37/02 ,  H03K3/26 ,  G05F1/10

CPC分类号： H03F3/347 ,  G05F3/262 ,  H03F3/087 ,  H03F2200/456 ,  H03F2200/91

摘要： A current driving circuit may include a reference voltage input terminal; a resistor connection terminal; an output terminal via which the light emitting element is connected; a reference voltage generating unit; a transistor arranged such that one terminal thereof is connected to the resistor connection terminal; and an operational amplifier including first and second non-inverting input terminals and a single inverting input terminal, and arranged such that the output terminal thereof is connected to a control terminal of the transistor, the internal reference voltage is input to the first non-inverting input terminal, the external reference voltage is input to the second non-inverting input terminal, and the inverting input terminal thereof is connected to the resistor connection terminal. When the external resistor is connected between the resistor connection terminal and a ground terminal, a driving current is output via the output terminal.

摘要翻译： 电流驱动电路可以包括参考电压输入端; 电阻连接端子; 连接发光元件的输出端子; 参考电压产生单元; 晶体管，其一端连接到电阻器连接端子; 以及包括第一和第二非反相输入端子和单反相输入端子的运算放大器，并且被布置为使得其输出端子连接到晶体管的控制端子，内部参考电压被输入到第一非反相 输入端子，外部参考电压输入到第二同相输入端子，其反相输入端子连接到电阻器连接端子。 当外部电阻连接在电阻连接端子和接地端子之间时，通过输出端子输出驱动电流。

公开(公告)号：US08085102B2

公开(公告)日：2011-12-27

申请号：US12555621

申请日：2009-09-08

申请人： Simon Muller

发明人： Simon Muller

IPC分类号： H03K3/26

CPC分类号： H03K3/0233 ,  H03K4/502

摘要： The low-power relaxation oscillator comprises a first module (21) having a ramp generator formed by a reference current source (31) and a storage capacitor (32) defining a ramp voltage (Vramp1), and a voltage comparator (m1, m2) for comparing the ramp voltage with a reference voltage, a second module (22, 41, 42, Vramp2, m3, m4) similar to the first module and an asynchronous flip-flop (23) receiving the output signal of the comparator of the first module at a first input (s) and the output signal of the comparator of the second module at a second input (r). For each module a generator of said reference voltage is configured by adding a reference resistance (33, 43) between the reference current source and the storage capacitor. Thus, the generation of the reference voltage and the ramp voltage is conducted on the very same current branch. This enables the electrical power consumption of the oscillator to be reduced.

摘要翻译： 低功率张弛振荡器包括具有由参考电流源（31）形成的斜坡发生器和限定斜坡电压（Vramp1）的存储电容器（32）形成的斜坡发生器的第一模块（21）和电压比较器（m1，m2） 用于将斜坡电压与参考电压进行比较，类似于第一模块的第二模块（22,41,42，Vramp2，m3，m4）和异步触发器（23），其接收第一模块的比较器的输出信号 模块和第二模块的比较器的输出信号在第二输入端（r）。 对于每个模块，通过在参考电流源和存储电容器之间增加参考电阻（33,43）来配置所述参考电压的发生器。 因此，在相同的电流分支上进行参考电压和斜坡电压的产生。 这使得能够降低振荡器的功率消耗。

公开(公告)号：US20110309889A1

公开(公告)日：2011-12-22

申请号：US13067328

申请日：2011-05-25

申请人： Tomokazu Matsuzaki ,  Kazutoshi Sako

发明人： Tomokazu Matsuzaki ,  Kazutoshi Sako

IPC分类号： H03K3/26 ,  H03L7/00

CPC分类号： H03K3/354 ,  H03K3/017 ,  H03K5/133 ,  H03K2005/00071 ,  H03L7/089

摘要： A variable-capacitance device includes a first capacitance element coupled between a first power supply terminal and an output terminal, a capacitance selection switch that is turned on and off in accordance with a capacitance switching signal, a second capacitance element coupled in parallel to the first capacitance element and in series to the capacitance selection switch, and an error correction circuit configured to operate such that in a state in which the capacitance selection switch is in an OFF state, in response to a charge reset signal that causes a voltage at the output terminal to be reset to a reset voltage, the error correction circuit substantially eliminates a difference between the voltage at the output terminal and a voltage at a capacitance switching node at which the second capacitance element is coupled to the capacitance selection switch.

摘要翻译： 可变电容器件包括耦合在第一电源端子和输出端子之间的第一电容元件，根据电容切换信号导通和截止的电容选择开关，与第一电源端子和输出端子并联连接的第二电容元件 电容元件并串联连接到电容选择开关，以及误差校正电路，被配置为在电容选择开关处于截止状态的状态下进行操作，响应于在输出端产生电压的电荷复位信号 端子复位到复位电压，误差校正电路基本上消除了输出端子处的电压与电容切换节点处的电压之间的差异，在该电容开关节点处第二电容元件耦合到电容选择开关。