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公开(公告)号:US20240314067A1
公开(公告)日:2024-09-19
申请号:US18120822
申请日:2023-03-13
发明人: Yoav Menes , Guy Rozenberg Kunievsky , Daniel Klein , Vladimir Koushnir , Michael Avimelech Gandelman Milgrom , Eitan Zahavi , Matty Kadosh
IPC分类号: H04L45/00 , H04L45/18 , H04L49/113
CPC分类号: H04L45/54 , H04L45/18 , H04L45/22 , H04L49/113
摘要: A network device, communication system, and method are provided. In one example, a network device is described that includes a plurality of switching elements, each switching element in the plurality of switching elements corresponding to a different plane from a plurality of planes in a planarized network. The network device also includes a ring mechanism generated based on a set of rules that permits inter-plane connectivity between the plurality of switching elements.
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公开(公告)号:US20240291775A1
公开(公告)日:2024-08-29
申请号:US18114860
申请日:2023-02-27
发明人: Lion Levi , Ortal Bashan , Alex Netes , Lior Hodaya Bezen , Guy Rozenberg Kunievsky , Inbal Gal , Vladimir Koushnir
IPC分类号: H04L49/113 , H04L45/00
CPC分类号: H04L49/113 , H04L45/54
摘要: A system for implementing a multiplane network comprises a network device including a plurality of switches for routing traffic to an endpoint through a network of other switches. Each switch in the plurality of switches corresponds to a different plane of the multiplane network. The system includes one or more circuits that manages the plurality of switches as a single logical entity.
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公开(公告)号:US11757772B2
公开(公告)日:2023-09-12
申请号:US17391057
申请日:2021-08-02
发明人: Tai-Yi Huang , Ming-Dao Chen , Yu-Yi Lin
IPC分类号: H04L45/00 , G06F15/173 , H04L45/58 , H04L45/60 , H04L49/113 , H04L49/112 , H04L45/037
CPC分类号: H04L45/583 , H04L45/037 , H04L45/60 , H04L49/112 , H04L49/113
摘要: A method used in a stacking/stackable switch unit includes: providing a plurality of signal ports of the stacking/stackable switch unit, the signal ports having at least one master/slave control port corresponding to at least one operation function of the stacking/stackable switch unit; during a boot-up procedure, automatically determining whether the stacking/stackable switch unit is a master or a slave according to at least one signal level of the at least one master/slave control port and/or content of at least one bit obtained from the at least one master/slave control port.
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