Method of operating a hearing assistive device having a rechargeable battery

    公开(公告)号:US12069433B2

    公开(公告)日:2024-08-20

    申请号:US17778490

    申请日:2020-10-25

    申请人: Widex A/S

    摘要: A method of operating a hearing assistive device having a rechargeable battery, and comprises reading battery status data from a battery controller during use of the hearing assistive device, transferring the battery status data wirelessly from the hearing assistive device to a computing device and predicting, in the computing device, a remaining battery time for the rechargeable battery based upon the battery status data received. Once the remaining battery time is predicted, it is compared with a predefined use pattern for hearing assistive device and a user becomes notified if a conflict between the remaining battery time and the predefined use pattern is observed.

    METHOD OF OPERATING A HEARING ASSISTIVE DEVICE HAVING A RECHARGEABLE BATTERY

    公开(公告)号:US20220417676A1

    公开(公告)日:2022-12-29

    申请号:US17778490

    申请日:2020-10-25

    申请人: Widex A/S

    摘要: A method of operating a hearing assistive device having a rechargeable battery, and comprises reading battery status data from a battery controller during use of the hearing assistive device, transferring the battery status data wirelessly from the hearing assistive device to a computing device and predicting, in the computing device, a remaining battery time for the rechargeable battery based upon the battery status data received. Once the remaining battery time is predicted, it is compared with a predefined use pattern for hearing assistive device and a user becomes notified if a conflict between the remaining battery time and the predefined use pattern is observed.

    DIFFERENTIAL DELTA-SIGMA MODULATOR FOR A HEARING AID

    公开(公告)号:US20220345151A1

    公开(公告)日:2022-10-27

    申请号:US17765688

    申请日:2020-09-28

    申请人: WIDEX A/S

    发明人: Niels Ole KNUDSEN

    IPC分类号: H03M3/00 H03F3/187 H04R25/00

    摘要: A differential delta-sigma-modulator has an integrator including a pair of single-ended amplifiers. A sample clock is driving a first switchable capacitor configuration and a second switchable capacitor configuration at a predetermined switching cycle. The first switchable capacitor configuration is adapted for sampling respective outputs from the pair of single-ended amplifiers on a pair of output sampling capacitors in the first part of the switching cycle. The second switchable capacitor configuration is adapted for charging a common mode capacitor with the average voltage of the voltage sampled by the pair of output sampling capacitors in the second part of the switching cycle. The voltage across the common mode capacitor represents the common mode voltage for the integrator.