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    Memory controller, system and method for read signal timing calibration
    1.
    发明授权
    Memory controller, system and method for read signal timing calibration 有权
    存储器控制器，读取信号定时校准的系统和方法

    公开(公告)号：US08504788B2

    公开(公告)日：2013-08-06

    申请号：US12520068

    申请日：2007-12-19

    申请人： Bret Stott ,  Frederick A. Ware ,  Ian P. Shaeffer ,  Yuanlong Wang

    发明人： Bret Stott ,  Frederick A. Ware ,  Ian P. Shaeffer ,  Yuanlong Wang

    IPC分类号： G06F12/00

    CPC分类号： G11C7/222 ,  G06F13/1689 ,  G11C7/02 ,  G11C7/22

    摘要： A memory controller includes an interface to receive a data strobe signal and corresponding read data. The data strobe signal and the read data correspond to a read command issued by the memory controller, and the read data is received in accordance with the data strobe signal and an enable signal. A circuit in the memory controller is to dynamically adjust a timing offset between the enable signal and the data strobe signal, and control logic is to issue a supplemental read command if a time interval since a last read command issued by the memory controller exceeds a predetermined value.

    摘要翻译： 存储器控制器包括用于接收数据选通信号和对应的读取数据的接口。 数据选通信号和读取数据对应于由存储器控制器发出的读取命令，并且根据数据选通信号和使能信号接收读取的数据。 存储器控制器中的电路是动态地调整使能信号和数据选通信号之间的定时偏移，并且如果由存储器控制器发出的最后读取命令之后的时间间隔超过预定值，则控制逻辑将发出补充读取命令 值。

    Strobe Acquisition and Tracking
    2.
    发明申请
    Strobe Acquisition and Tracking 有权
    频闪采集跟踪

    公开(公告)号：US20100039875A1

    公开(公告)日：2010-02-18

    申请号：US12520068

    申请日：2007-12-19

    申请人： Bret Stott ,  Frederick A. Ware ,  Ian P. Shaeffer ,  Yuanlong Wang

    发明人： Bret Stott ,  Frederick A. Ware ,  Ian P. Shaeffer ,  Yuanlong Wang

    IPC分类号： G11C7/00 ,  G11C8/00

    CPC分类号： G11C7/222 ,  G06F13/1689 ,  G11C7/02 ,  G11C7/22

    摘要： A memory controller includes an interface to receive a data strobe signal and corresponding read data. The data strobe signal and the read data correspond to a read command issued by the memory controller, and the read data is received in accordance with the data strobe signal and an enable signal. A circuit in the memory controller is to dynamically adjust a timing offset between the enable signal and the data strobe signal, and control logic is to issue a supplemental read command if a time interval since a last read command issued by the memory controller exceeds a predetermined value.

    摘要翻译： 存储器控制器包括用于接收数据选通信号和对应的读取数据的接口。 数据选通信号和读取数据对应于由存储器控制器发出的读取命令，并且根据数据选通信号和使能信号接收读取的数据。 存储器控制器中的电路是动态地调整使能信号和数据选通信号之间的定时偏移，并且如果由存储器控制器发出的最后读取命令之后的时间间隔超过预定值，则控制逻辑将发出补充读取命令 值。

    Unidirectional Error Code Transfer Method for a Bidirectional Data Link
    4.
    发明申请
    Unidirectional Error Code Transfer Method for a Bidirectional Data Link 有权
    双向数据链路的单向错误代码传输方法

    公开(公告)号：US20090249156A1

    公开(公告)日：2009-10-01

    申请号：US12479688

    申请日：2009-06-05

    申请人： Yuanlong Wang ,  Frederick A. Ware

    发明人： Yuanlong Wang ,  Frederick A. Ware

    IPC分类号： H03M13/09 ,  H04L1/08 ,  G06F11/10 ,  G06F11/14

    CPC分类号： G06F11/0727 ,  G06F3/0619 ,  G06F3/064 ,  G06F3/0679 ,  G06F11/073 ,  G06F11/0751 ,  G06F11/076 ,  G06F11/0793 ,  G06F11/10 ,  G06F11/1004 ,  G06F11/1008 ,  G06F11/1044 ,  G06F11/1068 ,  G06F11/1402 ,  G06F13/4286 ,  H03M13/09 ,  H03M13/29 ,  H03M13/2906 ,  H03M13/611 ,  H04L1/0003 ,  H04L1/0008 ,  H04L1/0061 ,  H04L1/08 ,  H04L1/1867 ,  H04L2001/0093

    摘要： A controller includes a link interface that is to couple to a first link to communicate bi-directional data and a second link to transmit unidirectional error-detection information. An encoder is to dynamically add first error-detection information to at least a portion of write data. A transmitter, coupled to the link interface, is to transmit the write data. A delay element is coupled to an output from the encoder. A receiver, coupled to the link interface, is to receive second error-detection information corresponding to at least the portion of the write data. Error-detection logic is coupled to an output from the delay element and an output from the receiver. The error-detection logic is to determine errors in at least the portion of the write data by comparing the first error-detection information and the second error-detection information, and, if an error is detected, is to assert an error condition.

    摘要翻译： 控制器包括要耦合到第一链路以传送双向数据的链路接口和用于发送单向错误检测信息的第二链路。 编码器将动态地将第一错误检测信息添加到写入数据的至少一部分。 耦合到链路接口的发射机是发送写入数据。 延迟元件耦合到编码器的输出。 耦合到链路接口的接收机是接收对应于写数据的至少一部分的第二错误检测信息。 错误检测逻辑耦合到来自延迟元件的输出和来自接收器的输出。 错误检测逻辑是通过比较第一错误检测信息和第二错误检测信息来确定写入数据的至少一部分中的错误，并且如果检测到错误则是断言错误状况。

    Unidirectional error code transfer for both read and write data transmitted via bidirectional data link
    5.
    发明授权
    Unidirectional error code transfer for both read and write data transmitted via bidirectional data link 有权
    通过双向数据链路发送的读取和写入数据的单向错误代码传输

    公开(公告)号：US08365042B2

    公开(公告)日：2013-01-29

    申请号：US13398768

    申请日：2012-02-16

    申请人： Yuanlong Wang ,  Frederick A. Ware

    发明人： Yuanlong Wang ,  Frederick A. Ware

    IPC分类号： G06F11/00 ,  G11C29/00

    CPC分类号： G06F11/0727 ,  G06F3/0619 ,  G06F3/064 ,  G06F3/0679 ,  G06F11/073 ,  G06F11/0751 ,  G06F11/076 ,  G06F11/0793 ,  G06F11/10 ,  G06F11/1004 ,  G06F11/1008 ,  G06F11/1044 ,  G06F11/1068 ,  G06F11/1402 ,  G06F13/4286 ,  H03M13/09 ,  H03M13/29 ,  H03M13/2906 ,  H03M13/611 ,  H04L1/0003 ,  H04L1/0008 ,  H04L1/0061 ,  H04L1/08 ,  H04L1/1867 ,  H04L2001/0093

    摘要： A controller includes a link interface that is to couple to a first link to communicate bi-directional data and a second link to transmit unidirectional error-detection information. An encoder is to dynamically add first error-detection information to at least a portion of write data. A transmitter, coupled to the link interface, is to transmit the write data. A delay element is coupled to an output from the encoder. A receiver, coupled to the link interface, is to receive second error-detection information corresponding to at least the portion of the write data. Error-detection logic is coupled to an output from the delay element and an output from the receiver. The error-detection logic is to determine errors in at least the portion of the write data by comparing the first error-detection information and the second error-detection information, and, if an error is detected, is to assert an error condition.

    摘要翻译： 控制器包括要耦合到第一链路以传送双向数据的链路接口和用于发送单向错误检测信息的第二链路。 编码器将动态地将第一错误检测信息添加到写入数据的至少一部分。 耦合到链路接口的发射机是发送写入数据。 延迟元件耦合到编码器的输出。 耦合到链路接口的接收机是接收对应于写数据的至少一部分的第二错误检测信息。 误差检测逻辑耦合到来自延迟元件的输出和来自接收器的输出。 错误检测逻辑是通过比较第一错误检测信息和第二错误检测信息来确定写入数据的至少一部分中的错误，并且如果检测到错误则是断言错误状况。

    Unidirectional Error Code Transfer for Both Read and Write Data Transmitted via Bidirectional Data Link
    6.
    发明申请
    Unidirectional Error Code Transfer for Both Read and Write Data Transmitted via Bidirectional Data Link 有权
    通过双向数据链路传输的读取和写入数据的单向错误代码传输

    公开(公告)号：US20120240010A1

    公开(公告)日：2012-09-20

    申请号：US13398768

    申请日：2012-02-16

    申请人： Yuanlong Wang ,  Frederick A. Ware

    发明人： Yuanlong Wang ,  Frederick A. Ware

    IPC分类号： G11C29/00

    CPC分类号： G06F11/0727 ,  G06F3/0619 ,  G06F3/064 ,  G06F3/0679 ,  G06F11/073 ,  G06F11/0751 ,  G06F11/076 ,  G06F11/0793 ,  G06F11/10 ,  G06F11/1004 ,  G06F11/1008 ,  G06F11/1044 ,  G06F11/1068 ,  G06F11/1402 ,  G06F13/4286 ,  H03M13/09 ,  H03M13/29 ,  H03M13/2906 ,  H03M13/611 ,  H04L1/0003 ,  H04L1/0008 ,  H04L1/0061 ,  H04L1/08 ,  H04L1/1867 ,  H04L2001/0093

    摘要： A controller includes a link interface that is to couple to a first link to communicate bi-directional data and a second link to transmit unidirectional error-detection information. An encoder is to dynamically add first error-detection information to at least a portion of write data. A transmitter, coupled to the link interface, is to transmit the write data. A delay element is coupled to an output from the encoder. A receiver, coupled to the link interface, is to receive second error-detection information corresponding to at least the portion of the write data. Error-detection logic is coupled to an output from the delay element and an output from the receiver. The error-detection logic is to determine errors in at least the portion of the write data by comparing the first error-detection information and the second error-detection information, and, if an error is detected, is to assert an error condition.

    摘要翻译： 控制器包括要耦合到第一链路以传送双向数据的链路接口和用于发送单向错误检测信息的第二链路。 编码器将动态地将第一错误检测信息添加到写入数据的至少一部分。 耦合到链路接口的发射机是发送写入数据。 延迟元件耦合到编码器的输出。 耦合到链路接口的接收机是接收对应于写数据的至少一部分的第二错误检测信息。 错误检测逻辑耦合到来自延迟元件的输出和来自接收器的输出。 错误检测逻辑是通过比较第一错误检测信息和第二错误检测信息来确定写入数据的至少一部分中的错误，并且如果检测到错误则是断言错误状况。

    Unidirectional error code transfer for both read and write data transmitted via bidirectional data link
    7.
    发明授权
    Unidirectional error code transfer for both read and write data transmitted via bidirectional data link 有权
    通过双向数据链接传输的读取和写入数据的单向错误代码传输

    公开(公告)号：US07882423B2

    公开(公告)日：2011-02-01

    申请号：US12479684

    申请日：2009-06-05

    申请人： Yuanlong Wang ,  Frederick A. Ware

    发明人： Yuanlong Wang ,  Frederick A. Ware

    IPC分类号： G06F11/00 ,  H03M13/00

    CPC分类号： G06F11/0727 ,  G06F3/0619 ,  G06F3/064 ,  G06F3/0679 ,  G06F11/073 ,  G06F11/0751 ,  G06F11/076 ,  G06F11/0793 ,  G06F11/10 ,  G06F11/1004 ,  G06F11/1008 ,  G06F11/1044 ,  G06F11/1068 ,  G06F11/1402 ,  G06F13/4286 ,  H03M13/09 ,  H03M13/29 ,  H03M13/2906 ,  H03M13/611 ,  H04L1/0003 ,  H04L1/0008 ,  H04L1/0061 ,  H04L1/08 ,  H04L1/1867 ,  H04L2001/0093

    摘要： A controller includes a link interface that is to couple to a first link to communicate bi-directional data and a second link to transmit unidirectional error-detection information. An encoder is to dynamically add first error-detection information to at least a portion of write data. A transmitter, coupled to the link interface, is to transmit the write data. A delay element is coupled to an output from the encoder. A receiver, coupled to the link interface, is to receive second error-detection information corresponding to at least the portion of the write data. Error-detection logic is coupled to an output from the delay element and an output from the receiver. The error-detection logic is to determine errors in at least the portion of the write data by comparing the first error-detection information and the second error-detection information, and, if an error is detected, is to assert an error condition.

    摘要翻译： 控制器包括要耦合到第一链路以传送双向数据的链路接口和用于发送单向错误检测信息的第二链路。 编码器将动态地将第一错误检测信息添加到写入数据的至少一部分。 耦合到链路接口的发射机是发送写入数据。 延迟元件耦合到编码器的输出。 耦合到链路接口的接收机是接收对应于写数据的至少一部分的第二错误检测信息。 错误检测逻辑耦合到来自延迟元件的输出和来自接收器的输出。 错误检测逻辑是通过比较第一错误检测信息和第二错误检测信息来确定写入数据的至少一部分中的错误，并且如果检测到错误则是断言错误状况。

    Unidirectional error code transfer method for a bidirectional data link
    8.
    发明授权
    Unidirectional error code transfer method for a bidirectional data link 有权
    用于双向数据链路的单向错误代码传输方法

    公开(公告)号：US07831888B2

    公开(公告)日：2010-11-09

    申请号：US12479688

    申请日：2009-06-05

    申请人： Yuanlong Wang ,  Frederick A. Ware

    发明人： Yuanlong Wang ,  Frederick A. Ware

    IPC分类号： H03M13/00

    CPC分类号： G06F11/0727 ,  G06F3/0619 ,  G06F3/064 ,  G06F3/0679 ,  G06F11/073 ,  G06F11/0751 ,  G06F11/076 ,  G06F11/0793 ,  G06F11/10 ,  G06F11/1004 ,  G06F11/1008 ,  G06F11/1044 ,  G06F11/1068 ,  G06F11/1402 ,  G06F13/4286 ,  H03M13/09 ,  H03M13/29 ,  H03M13/2906 ,  H03M13/611 ,  H04L1/0003 ,  H04L1/0008 ,  H04L1/0061 ,  H04L1/08 ,  H04L1/1867 ,  H04L2001/0093

    摘要： A controller includes a link interface that is to couple to a first link to communicate bi-directional data and a second link to transmit unidirectional error-detection information. An encoder is to dynamically add first error-detection information to at least a portion of write data. A transmitter, coupled to the link interface, is to transmit the write data. A delay element is coupled to an output from the encoder. A receiver, coupled to the link interface, is to receive second error-detection information corresponding to at least the portion of the write data. Error-detection logic is coupled to an output from the delay element and an output from the receiver. The error-detection logic is to determine errors in at least the portion of the write data by comparing the first error-detection information and the second error-detection information, and, if an error is detected, is to assert an error condition.

    摘要翻译： 控制器包括要耦合到第一链路以传送双向数据的链路接口和用于发送单向错误检测信息的第二链路。 编码器将动态地将第一错误检测信息添加到写入数据的至少一部分。 耦合到链路接口的发射机是发送写入数据。 延迟元件耦合到编码器的输出。 耦合到链路接口的接收机是接收对应于写数据的至少一部分的第二错误检测信息。 错误检测逻辑耦合到来自延迟元件的输出和来自接收器的输出。 错误检测逻辑是通过比较第一错误检测信息和第二错误检测信息来确定写入数据的至少一部分中的错误，并且如果检测到错误则是断言错误状况。

    Unidirectional Error Code Transfer for Both Read and Write Data Transmitted Via Bidirectional Data Link
    9.
    发明申请
    Unidirectional Error Code Transfer for Both Read and Write Data Transmitted Via Bidirectional Data Link 有权
    通过双向数据链路传输的读取和写入数据的单向错误代码传输

    公开(公告)号：US20130139019A1

    公开(公告)日：2013-05-30

    申请号：US13752324

    申请日：2013-01-28

    申请人： Yuanlong Wang ,  Frederick A. Ware

    发明人： Yuanlong Wang ,  Frederick A. Ware

    IPC分类号： G06F11/10 ,  H04L1/08

    CPC分类号： G06F11/0727 ,  G06F3/0619 ,  G06F3/064 ,  G06F3/0679 ,  G06F11/073 ,  G06F11/0751 ,  G06F11/076 ,  G06F11/0793 ,  G06F11/10 ,  G06F11/1004 ,  G06F11/1008 ,  G06F11/1044 ,  G06F11/1068 ,  G06F11/1402 ,  G06F13/4286 ,  H03M13/09 ,  H03M13/29 ,  H03M13/2906 ,  H03M13/611 ,  H04L1/0003 ,  H04L1/0008 ,  H04L1/0061 ,  H04L1/08 ,  H04L1/1867 ,  H04L2001/0093

    摘要： A controller includes a link interface that is to couple to a first link to communicate bi-directional data and a second link to transmit unidirectional error-detection information. An encoder is to dynamically add first error-detection information to at least a portion of write data. A transmitter, coupled to the link interface, is to transmit the write data. A delay element is coupled to an output from the encoder. A receiver, coupled to the link interface, is to receive second error-detection information corresponding to at least the portion of the write data. Error-detection logic is coupled to an output from the delay element and an output from the receiver. The error-detection logic is to determine errors in at least the portion of the write data by comparing the first error-detection information and the second error-detection information, and, if an error is detected, is to assert an error condition.

    摘要翻译： 控制器包括要耦合到第一链路以传送双向数据的链路接口和用于发送单向错误检测信息的第二链路。 编码器将动态地将第一错误检测信息添加到写入数据的至少一部分。 耦合到链路接口的发射机是发送写入数据。 延迟元件耦合到编码器的输出。 耦合到链路接口的接收机是接收对应于写数据的至少一部分的第二错误检测信息。 错误检测逻辑耦合到来自延迟元件的输出和来自接收器的输出。 错误检测逻辑是通过比较第一错误检测信息和第二错误检测信息来确定写入数据的至少一部分中的错误，并且如果检测到错误则是断言错误状况。

    Unidirectional error code transfer for both read and write data transmitted via bidirectional data link
    10.
    发明授权
    Unidirectional error code transfer for both read and write data transmitted via bidirectional data link 有权
    通过双向数据链接传输的读取和写入数据的单向错误代码传输

    公开(公告)号：US08656254B2

    公开(公告)日：2014-02-18

    申请号：US13752324

    申请日：2013-01-28

    申请人： Yuanlong Wang ,  Frederick A. Ware

    发明人： Yuanlong Wang ,  Frederick A. Ware

    IPC分类号： G11C29/00 ,  H03M13/00

    CPC分类号： G06F11/0727 ,  G06F3/0619 ,  G06F3/064 ,  G06F3/0679 ,  G06F11/073 ,  G06F11/0751 ,  G06F11/076 ,  G06F11/0793 ,  G06F11/10 ,  G06F11/1004 ,  G06F11/1008 ,  G06F11/1044 ,  G06F11/1068 ,  G06F11/1402 ,  G06F13/4286 ,  H03M13/09 ,  H03M13/29 ,  H03M13/2906 ,  H03M13/611 ,  H04L1/0003 ,  H04L1/0008 ,  H04L1/0061 ,  H04L1/08 ,  H04L1/1867 ,  H04L2001/0093

    摘要： A controller includes a link interface that is to couple to a first link to communicate bi-directional data and a second link to transmit unidirectional error-detection information. An encoder is to dynamically add first error-detection information to at least a portion of write data. A transmitter, coupled to the link interface, is to transmit the write data. A delay element is coupled to an output from the encoder. A receiver, coupled to the link interface, is to receive second error-detection information corresponding to at least the portion of the write data. Error-detection logic is coupled to an output from the delay element and an output from the receiver. The error-detection logic is to determine errors in at least the portion of the write data by comparing the first error-detection information and the second error-detection information, and, if an error is detected, is to assert an error condition.

    摘要翻译： 控制器包括要耦合到第一链路以传送双向数据的链路接口和用于发送单向错误检测信息的第二链路。 编码器将动态地将第一错误检测信息添加到写入数据的至少一部分。 耦合到链路接口的发射机是发送写入数据。 延迟元件耦合到编码器的输出。 耦合到链路接口的接收机是接收对应于写数据的至少一部分的第二错误检测信息。 错误检测逻辑耦合到来自延迟元件的输出和来自接收器的输出。 错误检测逻辑是通过比较第一错误检测信息和第二错误检测信息来确定写入数据的至少一部分中的错误，并且如果检测到错误则是断言错误状况。