公开(公告)号：US08982660B2

公开(公告)日：2015-03-17

申请号：US13571289

申请日：2012-08-09

申请人： Yongchang Huang ,  Jing Guo ,  Hua Chen ,  Jiping Ma

发明人： Yongchang Huang ,  Jing Guo ,  Hua Chen ,  Jiping Ma

IPC分类号： G11C8/10 ,  G11C8/14 ,  G11C11/418

CPC分类号： G11C11/418 ,  G11C8/14

摘要： The invention discloses a semiconductor memory device and a method for word line decoding and routing. The present invention relates generally to semiconductor memory field, Problems solved by the invention is that, to improve the quality of word line signals results in routing congestion. Embodiments of the invention provide the program as follows: a semiconductor memory device and a method for word line decoding and routing, dividing memory array of the semiconductor memory device into a plurality of smaller memory arrays, on a first metal layer routing first decoded row address, on a second metal layer below the first metal layer routing second decoded row address, and the output word line after decoding drives the plurality of smaller memory arrays. Embodiments of the invention are suitable for various semiconductor memory designs, including: on-chip cache, translation look-aside buffer, content addressable memory, ROM, EEPROM, and SRAM and so on.

摘要翻译： 本发明公开了一种用于字线解码和路由的半导体存储器件和方法。 本发明一般涉及半导体存储器领域，本发明解决的问题是提高字线信号的质量导致路由拥塞。 本发明的实施例提供如下程序：在第一金属层上路由第一解码行地址的半导体存储器件和用于字线解码和布线的方法，将半导体存储器件的存储器阵列分成多个较小的存储器阵列 在第一金属层下面的第二金属层上，路由第二解码行地址，并且解码后的输出字线驱动多个较小的存储器阵列。 本发明的实施例适用于各种半导体存储器设计，包括：片上高速缓存，翻译后备缓冲器，内容寻址存储器，ROM，EEPROM和SRAM等。

公开(公告)号：US20130322199A1

公开(公告)日：2013-12-05

申请号：US13571289

申请日：2012-08-09

申请人： Yongchang Huang ,  Jing Guo ,  Hua Chen ,  Jiping Ma

发明人： Yongchang Huang ,  Jing Guo ,  Hua Chen ,  Jiping Ma

IPC分类号： G11C8/10 ,  G11C8/08

CPC分类号： G11C11/418 ,  G11C8/14

摘要： The invention discloses a semiconductor memory device and a method for word line decoding and routing. The present invention relates generally to semiconductor memory field, Problems solved by the invention is that, to improve the quality of word line signals results in routing congestion. Embodiments of the invention provide the program as follows: a semiconductor memory device and a method for word line decoding and routing, dividing memory array of the semiconductor memory device into a plurality of smaller memory arrays, on a first metal layer routing first decoded row address, on a second metal layer below the first metal layer routing second decoded row address, and the output word line after decoding drives the plurality of smaller memory allays, Embodiments of the invention are suitable for various semiconductor memory designs, including: on-chip cache, translation look-aside buffer, content addressable memory, ROM, EEPROM, and SRAM and so on.

摘要翻译： 本发明公开了一种用于字线解码和路由的半导体存储器件和方法。 本发明一般涉及半导体存储器领域，本发明解决的问题是，提高字线信号的质量导致路由拥塞。 本发明的实施例提供如下程序：在第一金属层上路由第一解码行地址的半导体存储器件和用于字线解码和布线的方法，将半导体存储器件的存储器阵列分成多个较小的存储器阵列 在第一金属层下方的第二金属层上布置第二解码行地址，并且解码后的输出字线驱动多个更小的存储器，本发明的实施例适用于各种半导体存储器设计，包括：片上高速缓存 ，翻译后备缓冲区，内容可寻址存储器，ROM，EEPROM和SRAM等。