公开(公告)号：US10740529B1

公开(公告)日：2020-08-11

申请号：US16180853

申请日：2018-11-05

Applicant: Xilinx, Inc.

Inventor： Avinash Somalinga Suresh ,  Narendra Kumar Anumolu

IPC: G06F30/00 ,  G06F30/392 ,  H04B1/40

Abstract: Circuit designs and/or circuitry for integrated circuits (ICs) can be generated for radio-frequency (RF) applications by determining, using computer hardware, a value of a parameter of a super-sampling rate (SSR) block within a model of a circuit, wherein the value indicates a number of a plurality of data channels of the SSR block, automatically creating, using the computer hardware, a primary input port and a primary output port for the SSR block based on functionality of the SSR block, wherein vector size of the primary input port and the primary output port is determined from the value of the parameter, automatically creating, using the computer hardware, a plurality of scalar instances of the SSR block based on the value of the parameter, wherein the plurality of scalar instances are arranged in parallel, and configuring, using the computer hardware, each scalar instance of the plurality of scalar instances based on a parameterization of the SSR block.