公开(公告)号：US10348310B1

公开(公告)日：2019-07-09

申请号：US15992646

申请日：2018-05-30

Applicant: Xilinx, Inc.

Inventor： Karim M. Megawer ,  Parag Upadhyaya ,  Didem Z. Turker Melek ,  Zhaoyin D. Wu

IPC: H03L7/08 ,  H03M3/00 ,  H03L7/197

Abstract: An example sigma delta modulator (SDM) circuit includes a floor circuit, a subtractor having a first input coupled an input of the floor circuit and a second input coupled to an output of the floor circuit, and a multi-stage noise shaping (MASH) converter having a programmable order. The MASH converter includes an input coupled to an output of the subtractor. The SDM further includes a programmable delay circuit having an input coupled to the output of the floor circuit, and an adder having a first input coupled to an output of the MASH converter and a second input coupled to an output of the programmable delay circuit.