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公开(公告)号:US12205555B2
公开(公告)日:2025-01-21
申请号:US17622758
申请日:2021-12-15
Inventor: Jing Lv , Guoyu Zhang , Yuhang Jiang
IPC: G09G3/36
Abstract: A gate driving circuit and a display panel. The gate driving circuit includes a plurality of cascaded gate driving units, wherein a Nth stage gate driving unit includes a pull-up control module and a node signal control module. By an adjustment of the signals connected to a first input terminal, a second input terminal, a first control terminal, and a second control terminal of the node signal control module, an original driving time sequence can be realized without using a clock signal, which reduces a space occupied by a frame.
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公开(公告)号:US20240038193A1
公开(公告)日:2024-02-01
申请号:US17622758
申请日:2021-12-15
Inventor: Jing Lv , Guoyu Zhang , Yuhang Jiang
IPC: G09G3/36
CPC classification number: G09G3/3677 , G09G2310/08
Abstract: A gate driving circuit and a display panel. The gate driving circuit includes a plurality of cascaded gate driving units, wherein a Nth stage gate driving unit includes a pull-up control module and a node signal control module. By an adjustment of the signals connected to a first input terminal, a second input terminal, a first control terminal, and a second control terminal of the node signal control module, an original driving time sequence can be realized without using a clock signal, which reduces a space occupied by a frame.
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