公开(公告)号：US20170169600A1

公开(公告)日：2017-06-15

申请号：US15174253

申请日：2016-06-06

Applicant: VIA ALLIANCE SEMICONDUCTOR CO., LTD.

Inventor： FENGXIA WU ,  WEI ZHANG ,  ZHOU HONG ,  YUANFENG WANG

IPC: G06T15/00 ,  G06T19/20 ,  G06T7/00 ,  G06T1/60 ,  G06T15/80

CPC classification number: G06T15/005 ,  G06T1/60 ,  G06T15/80 ,  G06T19/20 ,  G06T2200/04 ,  G06T2200/28

Abstract: A device for image processing includes a first queue, a second queue, a cache, and a processor. The first queue is capable of receiving a first image tile. The processor is electrically connected to the first queue, the second queue, and the cache, respectively. The processor is capable of obtaining the first image tile from the first queue and obtaining mask information of the background mask corresponding to the first tile from the cache. The processor determines the relationship between the first image tile and the background mask based on the first image tile and the mask information so as to selectively transfer the first image tile to the second queue.