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    Differential To Single-Ended Summation Circuit With Improved Common-Mode Rejection Ratio
    1.
    发明公开
    Differential To Single-Ended Summation Circuit With Improved Common-Mode Rejection Ratio 审中-公开

    公开(公告)号：US20240171144A1

    公开(公告)日：2024-05-23

    申请号：US17990682

    申请日：2022-11-19

    Applicant: Texas Instruments Incorporated

    Inventor： Ravikumar Pattipaka ,  Prashuk Jain ,  Vajeed Nimran

    IPC: H03F3/45

    CPC classification number: H03F3/45928 ,  H03F3/45076 ,  H03F2200/231 ,  H03F2200/294

    Abstract: A differential to single-ended summation circuit includes a first switch which includes a first terminal coupled to a first circuit input and includes a second terminal. The circuit includes a second switch which includes a first terminal coupled to a second circuit input and includes a second terminal. The circuit includes a holding capacitor which includes a first terminal coupled to the second terminal of the first switch and a second terminal coupled to the second terminal of the second switch. The circuit includes a third switch which includes a first terminal coupled to the second terminal of the first switch and a second terminal coupled to a circuit output. The circuit includes a fourth switch including a first terminal coupled to the second terminal of the second switch and a second terminal coupled to a common potential.

    Passive beamformer
    3.
    发明授权
    Passive beamformer 有权

    公开(公告)号：US10573292B2

    公开(公告)日：2020-02-25

    申请号：US15782945

    申请日：2017-10-13

    Applicant: TEXAS INSTRUMENTS INCORPORATED

    Inventor： Ravikumar Pattipaka ,  Vajeed Nimran ,  Sandeep Oswal

    IPC: G10K11/34 ,  A61B8/00 ,  G01S15/89 ,  A61B8/08 ,  G01S7/52

    Abstract: A passive beamformer for ultrasound imaging. An ultrasound probe includes a plurality of ultrasound transducers and beamforming circuitry. Each of the ultrasound transducers is configured to convert ultrasonic signal into electrical signal. The beamforming circuitry is coupled to the plurality of ultrasound transducers. The beamforming circuitry includes a plurality of passive delay circuits and a passive hold circuit. One of the passive delay circuits is coupled to each of the ultrasound transducers. The passive hold circuit is coupled to the passive delay circuits to store a sum of the charges received from the delay circuits.

    TIME GAIN COMPENSATION CIRCUIT IN AN ULTRASOUND RECEIVER
    4.
    发明申请
    TIME GAIN COMPENSATION CIRCUIT IN AN ULTRASOUND RECEIVER 审中-公开
    超声波接收机中的时间增益补偿电路

    公开(公告)号：US20150280662A1

    公开(公告)日：2015-10-01

    申请号：US14637146

    申请日：2015-03-03

    Applicant: Texas Instruments Incorporated

    Inventor： Vajeed Nimran ,  Raja Sekhar ,  Sandeep Oswal ,  Shagun Dusad

    IPC: H03F3/45 ,  H03F1/56 ,  A61B8/14

    CPC classification number: H03F1/56 ,  G01S7/52033 ,  H03F3/45475 ,  H03F2203/45134 ,  H03F2203/45151 ,  H03F2203/45528 ,  H03F2203/45591 ,  H03G1/0035 ,  H03G3/3005 ,  H03G3/301

    Abstract: The disclosure provides a time gain compensation (TGC) circuit. The TGC circuit includes an impedance network. A differential amplifier is coupled to the impedance network. The differential amplifier includes a first input port, a second input port, a first output port and a second output port. A first feedback resistor is coupled between the first input port and the first output port. A second feedback resistor is coupled between the second input port and the second output port. The impedance network provides a fixed impedance to the differential amplifier when a gain of the TGC circuit is changed from a maximum value to a minimum value.

    Abstract translation: 本公开提供了时间增益补偿（TGC）电路。 TGC电路包括阻抗网络。 差分放大器耦合到阻抗网络。 差分放大器包括第一输入端口，第二输入端口，第一输出端口和第二输出端口。 第一反馈电阻耦合在第一输入端口和第一输出端口之间。 第二反馈电阻耦合在第二输入端口和第二输出端口之间。 当TGC电路的增益从最大值变为最小值时，阻抗网络向差分放大器提供固定阻抗。

    Time gain compensation circuit in an ultrasound receiver
    6.
    发明授权
    Time gain compensation circuit in an ultrasound receiver 有权

    公开(公告)号：US10985708B2

    公开(公告)日：2021-04-20

    申请号：US15980771

    申请日：2018-05-16

    Applicant: Texas Instruments Incorporated

    Inventor： Vajeed Nimran ,  Raja Sekhar ,  Sandeep Oswal ,  Shagun Dusad

    IPC: H03F1/56 ,  H03F3/45 ,  H03G1/00 ,  H03G3/30 ,  G01S7/52

    Abstract: The disclosure provides a time gain compensation (TGC) circuit. The TGC circuit includes an impedance network. A differential amplifier is coupled to the impedance network. The differential amplifier includes a first input port, a second input port, a first output port and a second output port. A first feedback resistor is coupled between the first input port and the first output port. A second feedback resistor is coupled between the second input port and the second output port. The impedance network provides a fixed impedance to the differential amplifier when a gain of the TGC circuit is changed from a maximum value to a minimum value.

    METHODS AND APPARATUS TO FORM AN IMAGE WITH DYNAMIC DELAY AND GAIN BEAMFORMING
    9.
    发明申请
    METHODS AND APPARATUS TO FORM AN IMAGE WITH DYNAMIC DELAY AND GAIN BEAMFORMING 有权

    公开(公告)号：US20250007580A1

    公开(公告)日：2025-01-02

    申请号：US18755227

    申请日：2024-06-26

    Applicant: Texas Instruments Incorporated

    Inventor： Vajeed Nimran ,  Sachin Aithal ,  Shabbir Amjhera Wala ,  Rahul Reji

    IPC: H04B7/06

    Abstract: An example apparatus includes: at least one memory; programmable circuitry; and machine readable instructions to cause the programmable circuitry to at least: determine beamforming delay profiles for a plurality of channels, the beamforming delay profiles including delay values corresponding to a distance from a channel for a beamline; split the beamforming delay profiles into a plurality of segments; fit the plurality of segments of the beamforming delay profiles to linear segments; generate piece-wise beamforming delay profiles including initial values of the beamforming delay profiles, slopes of the linear segments of the plurality of segments, and durations of the plurality of segments; and store the piece-wise beamforming delay profiles for beamforming.

    METHODS AND APPARATUS TO FORM AN IMAGE WITH DYNAMIC DELAY AND GAIN BEAMFORMING
    10.
    发明申请
    METHODS AND APPARATUS TO FORM AN IMAGE WITH DYNAMIC DELAY AND GAIN BEAMFORMING 有权

    公开(公告)号：US20250004116A1

    公开(公告)日：2025-01-02

    申请号：US18755238

    申请日：2024-06-26

    Applicant: Texas Instruments Incorporated

    Inventor： Vajeed Nimran ,  Sachin Aithal ,  Shabbir Amjhera Wala ,  Rahul Reji

    IPC: G01S7/52 ,  G01S15/89 ,  H03M1/12

    Abstract: An example apparatus includes: analog-to-digital converter (ADC) circuitry having an output terminal; beamforming circuitry including: delay circuitry having a first input terminal, a second input terminal, and an output terminal, the first input terminal of the delay circuitry coupled to the output terminal of the ADC circuitry; amplifier circuitry having an input terminal and an output terminal, the input terminal of the amplifier circuitry coupled to the output terminal of the delay circuitry; and summation circuitry having an input terminal coupled to the output terminal of the amplifier circuitry; beamforming control circuitry coupled to the second input terminal of the delay circuitry, the beamforming control circuitry configured to calculate a delay value based on a piecewise delay profile.

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