System and method of electromigration mitigation in stacked IC designs
    1.
    发明授权
    System and method of electromigration mitigation in stacked IC designs 有权
    堆叠式IC设计中电迁移缓解的系统和方法

    公开(公告)号:US09223919B2

    公开(公告)日:2015-12-29

    申请号:US14101448

    申请日:2013-12-10

    CPC classification number: G06F17/5045 G06F17/5081

    Abstract: A computer implemented method comprises accessing a 3D-IC model stored in a tangible, non-transitory machine readable medium, processing the model in a computer processor to generate a temperature map containing temperatures at a plurality of points of the 3D-IC under the operating condition; identifying an electromigration (EM) rating factor, and calculating and outputting from the processor data representing a temperature-dependent EM current constraint at each point.

    Abstract translation: 计算机实现的方法包括访问存储在有形的,非暂时的机器可读介质中的3D-IC模型,在计算机处理器中处理该模型以产生包含在操作下的3D-IC的多个点处的温度的温度图 条件; 识别电迁移(EM)额定因子,以及从处理器计算和输出表示每个点处的温度依赖EM电流约束的数据。

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