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公开(公告)号:US20220285264A1
公开(公告)日:2022-09-08
申请号:US17470680
申请日:2021-09-09
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Yuan-Yang Hsiao , Hsiang-Ku Shen , Dian-Hau Chen , Hsiao Ching-Wen , Yao-Chun Chuang
IPC: H01L23/522 , H01L23/528 , H01L49/02 , H01L21/768
Abstract: A metal-insulator-metal (MIM) structure and methods of forming the same for reducing the accumulation of external stress at the corners of the conductor layers are disclosed herein. An exemplary device includes a substrate that includes an active semiconductor device. A stack of dielectric layers is disposed over the substrate. A lower contact is disposed over the stack of dielectric layers. A passivation layer is disposed over the lower contact. A MIM structure is disposed over the passivation layer, the MIM structure including a first conductor layer, a second conductor layer disposed over the first conductor layer, and a third conductor layer disposed over the second conductor layer. A first insulator layer is disposed between the first conductor layer and the second conductor layer. A second insulator layer is disposed between the second conductor layer and the third conductor layer. One or more corners of the third conductor layer are rounded.
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公开(公告)号:US12107041B2
公开(公告)日:2024-10-01
申请号:US18359011
申请日:2023-07-26
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Yuan-Yang Hsiao , Hsiang-Ku Shen , Dian-Hau Chen , Hsiao Ching-Wen , Yao-Chun Chuang
IPC: H01L23/522 , H01L21/768 , H01L23/528 , H01L49/02 , H10B12/00
CPC classification number: H01L23/5223 , H01L21/76843 , H01L23/528 , H01L28/40 , H01L28/75 , H01L28/84 , H01L28/91 , H10B12/033
Abstract: A metal-insulator-metal (MIM) structure and methods of forming the same for reducing the accumulation of external stress at the corners of the conductor layers are disclosed herein. An exemplary device includes a substrate that includes an active semiconductor device. A stack of dielectric layers is disposed over the substrate. A lower contact is disposed over the stack of dielectric layers. A passivation layer is disposed over the lower contact. A MIM structure is disposed over the passivation layer, the MIM structure including a first conductor layer, a second conductor layer disposed over the first conductor layer, and a third conductor layer disposed over the second conductor layer. A first insulator layer is disposed between the first conductor layer and the second conductor layer. A second insulator layer is disposed between the second conductor layer and the third conductor layer. One or more corners of the third conductor layer are rounded.
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公开(公告)号:US20230369199A1
公开(公告)日:2023-11-16
申请号:US18359011
申请日:2023-07-26
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Yuan-Yang Hsiao , Hsiang-Ku Shen , Dian-Hau Chen , Hsiao Ching-Wen , Yao-Chun Chuang
IPC: H01L23/522 , H01L21/768 , H01L23/528
CPC classification number: H01L23/5223 , H01L21/76843 , H01L28/40 , H01L23/528 , H01L28/91 , H10B12/033
Abstract: A metal-insulator-metal (MIM) structure and methods of forming the same for reducing the accumulation of external stress at the corners of the conductor layers are disclosed herein. An exemplary device includes a substrate that includes an active semiconductor device. A stack of dielectric layers is disposed over the substrate. A lower contact is disposed over the stack of dielectric layers. A passivation layer is disposed over the lower contact. A MIM structure is disposed over the passivation layer, the MIM structure including a first conductor layer, a second conductor layer disposed over the first conductor layer, and a third conductor layer disposed over the second conductor layer. A first insulator layer is disposed between the first conductor layer and the second conductor layer. A second insulator layer is disposed between the second conductor layer and the third conductor layer. One or more corners of the third conductor layer are rounded.
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公开(公告)号:US11728262B2
公开(公告)日:2023-08-15
申请号:US17470680
申请日:2021-09-09
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Yuan-Yang Hsiao , Hsiang-Ku Shen , Dian-Hau Chen , Hsiao Ching-Wen , Yao-Chun Chuang
IPC: H01L23/522 , H01L21/768 , H01L23/528 , H10B12/00 , H01L49/02
CPC classification number: H01L23/5223 , H01L21/76843 , H01L23/528 , H01L28/40 , H01L28/91 , H10B12/033
Abstract: A metal-insulator-metal (MIM) structure and methods of forming the same for reducing the accumulation of external stress at the corners of the conductor layers are disclosed herein. An exemplary device includes a substrate that includes an active semiconductor device. A stack of dielectric layers is disposed over the substrate. A lower contact is disposed over the stack of dielectric layers. A passivation layer is disposed over the lower contact. A MIM structure is disposed over the passivation layer, the MIM structure including a first conductor layer, a second conductor layer disposed over the first conductor layer, and a third conductor layer disposed over the second conductor layer. A first insulator layer is disposed between the first conductor layer and the second conductor layer. A second insulator layer is disposed between the second conductor layer and the third conductor layer. One or more corners of the third conductor layer are rounded.
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公开(公告)号:US20240379529A1
公开(公告)日:2024-11-14
申请号:US18779664
申请日:2024-07-22
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Yuan-Yang Hsiao , Hsiang-Ku Shen , Dian-Hau Chen , Hsiao Ching-Wen , Yao-Chun Chuang
IPC: H01L23/522 , H01L21/768 , H01L23/528 , H10B12/00
Abstract: A metal-insulator-metal (MIM) structure and methods of forming the same for reducing the accumulation of external stress at the corners of the conductor layers are disclosed herein. An exemplary device includes a substrate that includes an active semiconductor device. A stack of dielectric layers is disposed over the substrate. A lower contact is disposed over the stack of dielectric layers. A passivation layer is disposed over the lower contact. A MIM structure is disposed over the passivation layer, the MIM structure including a first conductor layer, a second conductor layer disposed over the first conductor layer, and a third conductor layer disposed over the second conductor layer. A first insulator layer is disposed between the first conductor layer and the second conductor layer. A second insulator layer is disposed between the second conductor layer and the third conductor layer. One or more corners of the third conductor layer are rounded.
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