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公开(公告)号:US11532692B2
公开(公告)日:2022-12-20
申请号:US17140766
申请日:2021-01-04
发明人: Chun Kai Tzeng , Cheng Jen Lin , Yung-Ching Chao , Ming-Da Cheng , Mirng-Ji Lii
IPC分类号: H01L27/08 , H01L49/02 , H01L21/311 , H01L23/522
摘要: A method of forming an integrated circuit structure includes forming a first magnetic layer, forming a first conductive line over the first magnetic layer, and coating a photo-sensitive coating on the first magnetic layer. The photo-sensitive coating includes a first portion directly over the first conductive line, and a second portion offset from the first conductive line. The first portion is joined to the second portion. The method further includes performing a first light-exposure on the first portion of the photo-sensitive coating, performing a second light-exposure on both the first portion and the second portion of the photo-sensitive coating, developing the photo-sensitive coating, and forming a second magnetic layer over the photo-sensitive coating.
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公开(公告)号:US20210151550A1
公开(公告)日:2021-05-20
申请号:US17140766
申请日:2021-01-04
发明人: Chun Kai Tzeng , Cheng Jen Lin , Yung-Ching Chao , Ming-Da Cheng , Mirng-Ji Lii
IPC分类号: H01L49/02 , H01L21/311 , H01L23/522
摘要: A method of forming an integrated circuit structure includes forming a first magnetic layer, forming a first conductive line over the first magnetic layer, and coating a photo-sensitive coating on the first magnetic layer. The photo-sensitive coating includes a first portion directly over the first conductive line, and a second portion offset from the first conductive line. The first portion is joined to the second portion. The method further includes performing a first light-exposure on the first portion of the photo-sensitive coating, performing a second light-exposure on both the first portion and the second portion of the photo-sensitive coating, developing the photo-sensitive coating, and forming a second magnetic layer over the photo-sensitive coating.
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公开(公告)号:US20210288009A1
公开(公告)日:2021-09-16
申请号:US17333187
申请日:2021-05-28
发明人: Ming-Da Cheng , Yung-Ching Chao , Chun Kai Tzeng , Cheng Jen Lin , Chin Wei Kang , Yu-Feng Chen , Mirng-Ji Lii
IPC分类号: H01L23/00 , H01L23/522 , H01L23/31
摘要: A method of forming an integrated circuit structure includes forming a patterned passivation layer over a metal pad, with a top surface of the metal pad revealed through a first opening in the patterned passivation layer, and applying a polymer layer over the patterned passivation layer. The polymer layer is substantially free from N-Methyl-2-pyrrolidone (NMP), and comprises aliphatic amide as a solvent. The method further includes performing a light-exposure process on the polymer layer, performing a development process on the polymer layer to form a second opening in the polymer layer, wherein the top surface of the metal pad is revealed to the second opening, baking the polymer, and forming a conductive region having a via portion extending into the second opening.
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