SEMICONDUCTOR MEMORY DEVICES AND METHODS OF MANUFACTURING THEREOF

    公开(公告)号:US20220320017A1

    公开(公告)日:2022-10-06

    申请号:US17458778

    申请日:2021-08-27

    摘要: A method for fabricating memory devices includes forming a first portion of a memory device that includes a first device portion and one or more first interface portions. The first device portion includes a plurality of first memory strings, each of which includes a plurality of first memory cells vertically separated from one another. Each of the one or more first interface portions, laterally abutted to one side of the first device portion, includes a plurality of first word lines (WLs). The method further includes forming a plurality of first source lines (SLs) and a plurality of first bit lines (BLs) in the first device portion. The method further includes forming a first seal ring structure that laterally encloses both the first device portion and the first interface portion concurrently with forming the pluralities of SLs and BLs.

    SEMICONDUCTOR MEMORY DEVICES AND METHODS OF MANUFACTURING THEREOF

    公开(公告)号:US20240363555A1

    公开(公告)日:2024-10-31

    申请号:US18769121

    申请日:2024-07-10

    IPC分类号: H01L23/58 H01L23/00 H10B51/20

    摘要: A method for fabricating memory devices includes forming a first portion of a memory device that includes a first device portion and one or more first interface portions. The first device portion includes a plurality of first memory strings, each of which includes a plurality of first memory cells vertically separated from one another. Each of the one or more first interface portions, laterally abutted to one side of the first device portion, includes a plurality of first word lines (WLs). The method further includes forming a plurality of first source lines (SLs) and a plurality of first bit lines (BLs) in the first device portion. The method further includes forming a first seal ring structure that laterally encloses both the first device portion and the first interface portion concurrently with forming the pluralities of SLs and BLs.

    SEMICONDUCTOR MEMORY DEVICES AND METHODS OF MANUFACTURING THEREOF

    公开(公告)号:US20240006348A1

    公开(公告)日:2024-01-04

    申请号:US18361227

    申请日:2023-07-28

    IPC分类号: H01L23/58 H01L23/00 H10B51/20

    摘要: A method for fabricating memory devices includes forming a first portion of a memory device that includes a first device portion and one or more first interface portions. The first device portion includes a plurality of first memory strings, each of which includes a plurality of first memory cells vertically separated from one another. Each of the one or more first interface portions, laterally abutted to one side of the first device portion, includes a plurality of first word lines (WLs). The method further includes forming a plurality of first source lines (SLs) and a plurality of first bit lines (BLs) in the first device portion. The method further includes forming a first seal ring structure that laterally encloses both the first device portion and the first interface portion concurrently with forming the pluralities of SLs and BLs.

    Semiconductor memory devices and methods of manufacturing thereof

    公开(公告)号:US12068263B2

    公开(公告)日:2024-08-20

    申请号:US18361227

    申请日:2023-07-28

    IPC分类号: H01L23/58 H01L23/00 H10B51/20

    摘要: A method for fabricating memory devices includes forming a first portion of a memory device that includes a first device portion and one or more first interface portions. The first device portion includes a plurality of first memory strings, each of which includes a plurality of first memory cells vertically separated from one another. Each of the one or more first interface portions, laterally abutted to one side of the first device portion, includes a plurality of first word lines (WLs). The method further includes forming a plurality of first source lines (SLs) and a plurality of first bit lines (BLs) in the first device portion. The method further includes forming a first seal ring structure that laterally encloses both the first device portion and the first interface portion concurrently with forming the pluralities of SLs and BLs.

    Semiconductor memory devices and methods of manufacturing thereof

    公开(公告)号:US11749623B2

    公开(公告)日:2023-09-05

    申请号:US17458778

    申请日:2021-08-27

    IPC分类号: H01L23/58 H10B51/20 H01L23/00

    摘要: A method for fabricating memory devices includes forming a first portion of a memory device that includes a first device portion and one or more first interface portions. The first device portion includes a plurality of first memory strings, each of which includes a plurality of first memory cells vertically separated from one another. Each of the one or more first interface portions, laterally abutted to one side of the first device portion, includes a plurality of first word lines (WLs). The method further includes forming a plurality of first source lines (SLs) and a plurality of first bit lines (BLs) in the first device portion. The method further includes forming a first seal ring structure that laterally encloses both the first device portion and the first interface portion concurrently with forming the pluralities of SLs and BLs.