公开(公告)号：US20130009208A1

公开(公告)日：2013-01-10

申请号：US13621002

申请日：2012-09-15

Applicant: Suraj J Mathew ,  Chandra Mouli

Inventor： Suraj J Mathew ,  Chandra Mouli

IPC: H01L29/74

CPC classification number: H01L29/74

Abstract: Memory devices and methods of making memory devices are shown. Methods and configurations as shown provide folded and vertical memory devices for increased memory density. Methods provided allow trace wiring in a memory array to be formed on or near a surface of a memory device.

Abstract translation: 显示存储器件和制造存储器件的方法。 所示的方法和配置提供用于增加存储器密度的折叠和垂直存储器件。 提供的方法允许存储器阵列中的迹线布线形成在存储器件的表面上或附近。

公开(公告)号：US06797596B2

公开(公告)日：2004-09-28

申请号：US10232980

申请日：2002-08-29

Applicant: Fawad Ahmed ,  Jigish D. Trivedi ,  Suraj J Mathew

Inventor： Fawad Ahmed ,  Jigish D. Trivedi ,  Suraj J Mathew

IPC: H01L21425

CPC classification number: H01L29/6659 ,  H01L21/2652 ,  H01L21/28061 ,  H01L29/4933 ,  Y10S438/914 ,  Y10S438/923

Abstract: A method used during the formation of a semiconductor device reduces ion channeling during implantation of the wafer. The method comprises providing a semiconductor wafer and an unetched transistor gate stack assembly over the wafer. The unetched transistor gate stack assembly comprises a gate oxide layer, a control gate layer, a metal layer, and a dielectric capping layer. A patterned photoresist layer is formed over the unetched transistor gate stack assembly, then each of the capping layer, the metal layer, the control gate layer, and the gate oxide layer is etched to form a plurality of laterally-spaced transistor gate stacks. A screening layer is formed overlying the semiconductor wafer between the transistor gate stacks. A dopant is implanted into the semiconductor wafer through the screening layer, then the screening layer is removed.