Method, system and program product for autonomous error recovery for memory devices
    1.
    发明申请
    Method, system and program product for autonomous error recovery for memory devices 有权
    用于存储设备自主性错误恢复的方法,系统和程序产品

    公开(公告)号:US20050229052A1

    公开(公告)日:2005-10-13

    申请号:US10820178

    申请日:2004-04-07

    CPC分类号: G06F11/1032 G06F12/0802

    摘要: An autonomous error recovery approach is provided for a memory device of a computing system. In response to a request for data, addressed data and associated control information of the memory device are tested for error. If error is detected, the contents of an addressed storage compartment of a second memory device are automatically retrieved and provided responsive to the request. As an example, the memory device may be a cache and the second memory device may be main memory for the computing system.

    摘要翻译: 为计算系统的存储器件提供自主的错误恢复方法。 响应于对数据的请求,测试存储器设备的寻址数据和相关控制信息的错误。 如果检测到错误,则响应于该请求,自动地检索并提供第二存储设备的寻址存储隔间的内容。 作为示例,存储器设备可以是高速缓存,并且第二存储器设备可以是计算系统的主存储器。

    METHOD, SYSTEM AND PROGRAM PRODUCT FOR AUTONOMOUS ERROR RECOVERY FOR MEMORY DEVICES
    2.
    发明申请
    METHOD, SYSTEM AND PROGRAM PRODUCT FOR AUTONOMOUS ERROR RECOVERY FOR MEMORY DEVICES 失效
    用于存储器件自动错误恢复的方法,系统和程序产品

    公开(公告)号:US20070240021A1

    公开(公告)日:2007-10-11

    申请号:US11763653

    申请日:2007-06-15

    IPC分类号: G01R31/28

    CPC分类号: G06F11/1032 G06F12/0802

    摘要: An autonomous error recovery approach is provided for a memory device of a computing system. In response to a request for data, addressed data and associated control information of the memory device are tested for error. If error is detected, the contents of an addressed storage compartment of a second memory device are automatically retrieved and provided responsive to the request. As an example, the memory device may be a cache and the second memory device may be main memory for the computing system.

    摘要翻译: 为计算系统的存储器件提供自主的错误恢复方法。 响应于对数据的请求,测试存储器设备的寻址数据和相关控制信息的错误。 如果检测到错误,则响应于该请求,自动地检索并提供第二存储设备的寻址存储隔间的内容。 作为示例,存储器设备可以是高速缓存,并且第二存储器设备可以是计算系统的主存储器。

    Method, system and program product for autonomous error recovery for memory devices
    3.
    发明授权
    Method, system and program product for autonomous error recovery for memory devices 失效
    用于存储设备自主性错误恢复的方法,系统和程序产品

    公开(公告)号:US07739557B2

    公开(公告)日:2010-06-15

    申请号:US11763653

    申请日:2007-06-15

    IPC分类号: G06K5/04 G11C29/00 G06F11/00

    CPC分类号: G06F11/1032 G06F12/0802

    摘要: An autonomous error recovery approach is provided for a memory device of a computing system. In response to a request for data, addressed data and associated control information of the memory device are tested for error. If error is detected, the contents of an addressed storage compartment of a second memory device are automatically retrieved and provided responsive to the request. As an example, the memory device may be a cache and the second memory device may be main memory for the computing system.

    摘要翻译: 为计算系统的存储器件提供自主的错误恢复方法。 响应于对数据的请求,测试存储器设备的寻址数据和相关控制信息的错误。 如果检测到错误,则响应于该请求,自动地检索并提供第二存储设备的寻址存储隔间的内容。 作为示例,存储器设备可以是高速缓存,并且第二存储器设备可以是计算系统的主存储器。

    Method, system and program product for autonomous error recovery for memory devices
    4.
    发明授权
    Method, system and program product for autonomous error recovery for memory devices 有权
    用于存储设备自主性错误恢复的方法,系统和程序产品

    公开(公告)号:US07275202B2

    公开(公告)日:2007-09-25

    申请号:US10820178

    申请日:2004-04-07

    IPC分类号: H03M13/00

    CPC分类号: G06F11/1032 G06F12/0802

    摘要: An autonomous error recovery approach is provided for a memory device of a computing system. In response to a request for data, addressed data and associated control information of the memory device are tested for error. If error is detected, the contents of an addressed storage compartment of a second memory device are automatically retrieved and provided responsive to the request. As an example, the memory device may be a cache and the second memory device may be main memory for the computing system.

    摘要翻译: 为计算系统的存储器件提供自主的错误恢复方法。 响应于对数据的请求,测试存储器设备的寻址数据和相关控制信息的错误。 如果检测到错误,则响应于该请求,自动地检索并提供第二存储设备的寻址存储隔间的内容。 作为示例,存储器设备可以是高速缓存,并且第二存储器设备可以是计算系统的主存储器。

    Operation based polling in a memory system
    5.
    发明授权
    Operation based polling in a memory system 有权
    在内存系统中进行基于操作的轮询

    公开(公告)号:US08904082B1

    公开(公告)日:2014-12-02

    申请号:US12054391

    申请日:2008-03-25

    IPC分类号: G06F12/00 G06F3/00

    摘要: Operation based polling in a memory system. A device manager is provided to perform efficient polling by utilizing the effective bandwidth of the memory system, in a controller coupled to a communication end point. The device manager includes a detection module for detecting a type of operation sent to the communication end point. The device manager also includes a storage module for storing a polling interval value based on a time period of the type of operation in a polling counter of the controller. Further, the device manager includes a controlling module for controlling a polling operation of the controller in such a way that the controller polls the communication end point after a wait period according to the polling interval value.

    摘要翻译: 在内存系统中进行基于操作的轮询。 提供了一种设备管理器,用于通过在耦合到通信端点的控制器中利用存储器系统的有效带宽来执行有效的轮询。 设备管理器包括用于检测发送到通信终点的操作类型的检测模块。 设备管理器还包括存储模块,用于基于控制器的轮询计数器中的操作类型的时间段来存储轮询间隔值。 此外,设备管理器包括控制模块,用于控制控制器的轮询操作,使得控制器根据轮询间隔值在等待周期之后轮询通信终点。

    Programmable sequence generator for a flash memory controller
    6.
    发明授权
    Programmable sequence generator for a flash memory controller 有权
    用于闪存控制器的可编程序列发生器

    公开(公告)号:US07941587B2

    公开(公告)日:2011-05-10

    申请号:US11856063

    申请日:2007-09-17

    IPC分类号: G06F12/00

    CPC分类号: G06F13/1668

    摘要: A programmable sequence generator for controlling a flash memory device. The programmable sequence generator includes a plurality of programmable sequence registers including control phase sequence (CPS) registers and data phase sequence (DPS) registers programmed with phase sequence values corresponding to an operation command sequence of the flash memory device; and logic circuitry in a programmable command sequencer for controlling a set of states of the programmable command sequencer using the plurality of programmable sequence registers.

    摘要翻译: 一种用于控制闪存器件的可编程序列发生器。 可编程序列发生器包括多个可编程序列寄存器,包括控制相位序列(CPS)寄存器和用相应序列值编程的数据相位序列(DPS)寄存器,该相位序列值对应于闪速存储器件的操作命令序列; 以及可编程命令定序器中的逻辑电路,用于使用多个可编程序列寄存器来控制可编程命令定序器的一组状态。