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公开(公告)号：US20210294494A1
公开(公告)日：2021-09-23
申请号：US17343495
申请日：2021-06-09
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Ramdas P. Kachare , Vijay Balakrishnan , Stephen G. Fischer , Fred Worley , Anahita Shayesteh , Zvi Guz
Abstract: A system includes a plurality of storage processing accelerators (SPAs), at least one SPA of the plurality of SPAs including a plurality of programmable processors or storage processing engines (SPEs), the plurality of SPEs including n SPEs (n is a natural number greater than zero), where 1st to (n−1) SPEs of the n SPEs are configured to provide an output of the SPE to a next SPE of the n SPEs in a pipeline to be used as an input of the next SPE; and an acceleration platform manager (APM) connected to the plurality of the SPAs and the plurality of SPEs, and configured to control data processing in the plurality of SPAs and the plurality of SPEs.
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公开(公告)号：US20200183582A1
公开(公告)日：2020-06-11
申请号：US16269508
申请日：2019-02-06
Applicant: Samsung Electronics Co., Ltd.
Inventor： Ramdas P. Kachare , Vijay Balakrishnan , Stephen G. Fischer , Fred Worley , Anahita Shayesteh , Zvi Guz
Abstract: A method includes: receiving, at an acceleration platform manager (APM) from an application service manager (ASM), application function processing information; allocating, by the APM, a first storage processing accelerator (SPA) from a plurality of SPAs, wherein at least one SPA of the plurality of SPAs comprises a plurality of programmable processors or storage processing engines (SPEs), the plurality of SPEs comprising n SPEs, enabling the plurality of SPEs in the first SPA, wherein once enabled, the at least one SPE of the plurality of SPEs in the first SPA is configured to process data based on the application function processing information; determining, by the APM, if data processing is completed by the at least one SPE of the plurality of SPEs in the first SPA; and sending, by the APM, a result of the data processing by the SPEs of the first SPA, to the ASM.
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公开(公告)号：US11112972B2
公开(公告)日：2021-09-07
申请号：US16269508
申请日：2019-02-06
Applicant: Samsung Electronics Co., Ltd.
Inventor： Ramdas P. Kachare , Vijay Balakrishnan , Stephen G. Fischer , Fred Worley , Anahita Shayesteh , Zvi Guz
Abstract: A method includes: receiving, at an acceleration platform manager (APM) from an application service manager (ASM), application function processing information; allocating, by the APM, a first storage processing accelerator (SPA) from a plurality of SPAs, wherein at least one SPA of the plurality of SPAs comprises a plurality of programmable processors or storage processing engines (SPEs), the plurality of SPEs comprising n SPEs, enabling the plurality of SPEs in the first SPA, wherein once enabled, the at least one SPE of the plurality of SPEs in the first SPA is configured to process data based on the application function processing information; determining, by the APM, if data processing is completed by the at least one SPE of the plurality of SPEs in the first SPA; and sending, by the APM, a result of the data processing by the SPEs of the first SPA, to the ASM.
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公开(公告)号：US20200183583A1
公开(公告)日：2020-06-11
申请号：US16270434
申请日：2019-02-07
Applicant: Samsung Electronics Co., Ltd.
Inventor： Ramdas P. Kachare , Vijay Balakrishnan , Stephen G. Fischer , Fred Worley , Anahita Shayesteh , Zvi Guz
Abstract: A system includes a plurality of storage processing accelerators (SPAs), at least one SPA of the plurality of SPAs including a plurality of programmable processors or storage processing engines (SPEs), the plurality of SPEs including n SPEs (n is a natural number greater than zero), where 1st to (n−1) SPEs of the n SPEs are configured to provide an output of the SPE to a next SPE of the n SPEs in a pipeline to be used as an input of the next SPE; and an acceleration platform manager (APM) connected to the plurality of the SPAs and the plurality of SPEs, and configured to control data processing in the plurality of SPAs and the plurality of SPEs.
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公开(公告)号：US10254998B2
公开(公告)日：2019-04-09
申请号：US15046435
申请日：2016-02-17
Applicant: Samsung Electronics Co., Ltd.
Inventor： Vikas Sinha , Zvi Guz , Gunneswara Rao Marripudi
Abstract: A distributed storage system can include a storage node (125, 130, 135). The storage node (125, 130, 135) can include a Solid State Drive (SSD) or other storage device that employs garbage collection (140, 145, 150, 155, 160, 165, 225, 230), a device garbage collection monitor (205), a garbage collection coordinator (210), an Input/Output (I/O) redirector (215), and an I/O resynchronizer (220). The device garbage collection monitor (205) can determine whether any storage devices (140, 145, 150, 155, 160, 165, 225, 230) need to perform garbage collection. The garbage collection coordinator (210) can schedule when the storage device (140, 145, 150, 155, 160, 165, 225, 230) can perform garbage collection. The I/O redirector (215) can redirect read requests (905) and write requests (1005) away from the storage device (140, 145, 150, 155, 160, 165, 225, 230) when it is performing garbage collection. The I/O resynchronizer (220) can ensure that data on the storage device (140, 145, 150, 155, 160, 165, 225, 230) is up-to-date after garbage collection finishes.
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Patent Agency Ranking
6.发明申请COMPUTING SYSTEM WITH HETEROGENEOUS STORAGE AND PROCESS MECHANISM AND METHOD OF OPERATION THEREOF 审中-公开具有异质存储和过程机制的计算系统及其操作方法公开(公告)号：US20160147573A1
公开(公告)日：2016-05-26
申请号：US14695747
申请日：2015-04-24
Applicant: Samsung Electronics Co., Ltd.
Inventor： Anahita Shayesteh , Zvi Guz , Jaehwan Lee
IPC: G06F9/50
CPC classification number: G06F9/5044 , G06F9/505
Abstract: A computing system includes: a monitor block configured to calculate a total access time based on a device access time, a traffic latency, a traffic information, or a combination thereof; a name node block, coupled to the monitor block, configured to determine a data location of a data content; and a scheduler block, coupled to the name node block, configured to distribute a task assignment based on the total access time, the data location, device performance criteria, or a combination thereof for accessing the data content from a target device.
Abstract translation: 计算系统包括：监视块，被配置为基于设备访问时间，业务等待时间，交通信息或其组合来计算总接入时间; 耦合到所述监视器块的名称节点块，被配置为确定数据内容的数据位置; 以及耦合到所述名称节点块的调度器块，被配置为基于所述总访问时间，所述数据位置，设备性能标准或其组合来分发来自目标设备的数据内容的任务分配。
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公开(公告)号：US12197388B2
公开(公告)日：2025-01-14
申请号：US17717031
申请日：2022-04-08
Applicant: Samsung Electronics Co., Ltd.
Inventor： Vikas Sinha , Zvi Guz , Ming Lin
IPC: G06F16/17 , G06F12/0882 , G06F16/13 , G06F16/16 , G06F16/172 , G06F16/188 , G06F16/84
Abstract: A system and method for leveraging a native operating system page cache when using non-block system storage devices is disclosed. A computer may include a processor, memory, and a non-block system storage device. A file system may be stored in memory and running on the processor, which may include a page cache. A key-value file system (KVFS) may reside between the file system and the storage device and may map received file system commands to key-value system commands that may be executed by the storage device. Results of the key-value system commands may be returned to the file system, permitting the operating system to cache data in the page cache.
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公开(公告)号：US11768601B2
公开(公告)日：2023-09-26
申请号：US17343495
申请日：2021-06-09
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Ramdas P. Kachare , Vijay Balakrishnan , Stephen G. Fischer , Fred Worley , Anahita Shayesteh , Zvi Guz
CPC classification number: G06F3/061 , G06F3/0656 , G06F3/0679 , G06F9/38 , G06F9/541 , G06F9/544
Abstract: A system includes a plurality of storage processing accelerators (SPAs), at least one SPA of the plurality of SPAs including a plurality of programmable processors or storage processing engines (SPEs), the plurality of SPEs including n SPEs (n is a natural number greater than zero), where 1st to (n−1) SPEs of the n SPEs are configured to provide an output of the SPE to a next SPE of the n SPEs in a pipeline to be used as an input of the next SPE; and an acceleration platform manager (APM) connected to the plurality of the SPAs and the plurality of SPEs, and configured to control data processing in the plurality of SPAs and the plurality of SPEs.
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9.发明申请公开(公告)号：US20180032580A1
公开(公告)日：2018-02-01
申请号：US15256431
申请日：2016-09-02
Applicant: Samsung Electronics Co., Ltd.
Inventor： Zvi Guz
IPC: G06F17/30
CPC classification number: G06F16/2365 , G06F16/21
Abstract: A method of managing a database, the method including determining whether a deterministic threshold has occurred, determining whether a random threshold has occurred, and initiating a maintenance process on the database when either the deterministic threshold or the random threshold has occurred.
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公开(公告)号：US12147358B2
公开(公告)日：2024-11-19
申请号：US18233870
申请日：2023-08-14
Applicant: Samsung Electronics Co., Ltd.
Inventor： Ramdas P. Kachare , Zvi Guz , Son T. Pham , Anahita Shayesteh , Xuebin Yao , Oscar Prem Pinto
Abstract: According to one general aspect, a device may include a host interface circuit configured to communicate with a host device via a data protocol that employs data messages. The device may include a storage element configured to store data in response to a data message. The host interface circuit may be configured to detect when a tunneling command is embedded within the data message; extract a tunneled message address information from the data message; retrieve, via the tunneled message address information, a tunneled message stored in a memory of the host device; and route the tunneled message to an on-board processor and/or data processing logic. The on-board processor and/or data processing logic may be configured to execute one or more instructions in response to the tunneled message.
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