公开(公告)号：US11784137B2

公开(公告)日：2023-10-10

申请号：US17151787

申请日：2021-01-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yun Rae Cho ,  Ae Nee Jang ,  Seung Hun Han

IPC: H01L23/00 ,  H01L23/31 ,  H01L23/532 ,  H01L21/78 ,  H01L21/56

CPC classification number: H01L23/562 ,  H01L21/78 ,  H01L23/3114 ,  H01L23/53295 ,  H01L21/561

Abstract: A semiconductor device in which reliability and production yield are improved by reducing or preventing the spreading of cracks that may occur in the die sawing process, and a method for fabricating the same are provided. The semiconductor device includes a substrate which includes a first chip region and a scribe lane region surrounding the first chip region, a first low-k insulating film, which includes a first insulating material having a dielectric constant lower than silicon oxide, on the substrate in the first chip region, a wiring structure, which includes a second low-k insulating film including the first insulating material and a first wiring pattern in the second low-k insulating film, on the substrate in the scribe lane region, and a first protective insulating film, which includes a second insulating material different from the first insulating material, between the first low-k insulating film and the wiring structure.

公开(公告)号：US20210143109A1

公开(公告)日：2021-05-13

申请号：US17151787

申请日：2021-01-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yun Rae Cho ,  Ae Nee Jang ,  Seung Hun Han

IPC: H01L23/00 ,  H01L23/31 ,  H01L23/532 ,  H01L21/78

Abstract: A semiconductor device in which reliability and production yield are improved by reducing or preventing the spreading of cracks that may occur in the die sawing process, and a method for fabricating the same are provided. The semiconductor device includes a substrate which includes a first chip region and a scribe lane region surrounding the first chip region, a first low-k insulating film, which includes a first insulating material having a dielectric constant lower than silicon oxide, on the substrate in the first chip region, a wiring structure, which includes a second low-k insulating film including the first insulating material and a first wiring pattern in the second low-k insulating film, on the substrate in the scribe lane region, and a first protective insulating film, which includes a second insulating material different from the first insulating material, between the first low-k insulating film and the wiring structure.

公开(公告)号：US11158589B2

公开(公告)日：2021-10-26

申请号：US16532542

申请日：2019-08-06

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seung Hun Han ,  Yun Rae Cho ,  Nam Gyu Baek ,  Ae Nee Jang

IPC: H01L23/58 ,  H01L23/00 ,  H01L23/31 ,  H01L21/78

Abstract: A semiconductor device has a semiconductor chip region which contains a semiconductor chip and a first portion of a passivation film covering the semiconductor chip and a scribe line region which contains a second portion of the passivation film connected to the first portion of the passivation film, a first insulating film protruding from a distal end of the second portion of the passivation film, and at least a part of a first wiring. A first portion of the first insulating film is disposed along the distal end of the second portion of the passivation film, a second portion of the first insulating film protrudes laterally beyond the first portion of the first insulating film, and the first wiring protrudes laterally beyond the second portion of the first insulating film.

公开(公告)号：US10930602B2

公开(公告)日：2021-02-23

申请号：US16512469

申请日：2019-07-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yun Rae Cho ,  Ae Nee Jang ,  Seung Hun Han

IPC: H01L23/00 ,  H01L23/31 ,  H01L23/532 ,  H01L21/78 ,  H01L21/56

Abstract: A semiconductor device in which reliability and production yield are improved by reducing or preventing the spreading of cracks that may occur in the die sawing process, and a method for fabricating the same are provided. The semiconductor device includes a substrate which includes a first chip region and a scribe lane region surrounding the first chip region, a first low-k insulating film, which includes a first insulating material having a dielectric constant lower than silicon oxide, on the substrate in the first chip region, a wiring structure, which includes a second low-k insulating film including the first insulating material and a first wiring pattern in the second low-k insulating film, on the substrate in the scribe lane region, and a first protective insulating film, which includes a second insulating material different from the first insulating material, between the first low-k insulating film and the wiring structure.