公开(公告)号：US20240282833A1

公开(公告)日：2024-08-22

申请号：US18364612

申请日：2023-08-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sanghoon UHM ,  Min Hee CHO ,  Wonsok LEE ,  Wooje JUNG

IPC: H01L29/423 ,  H01L29/51 ,  H10B12/00

CPC classification number: H01L29/42364 ,  H01L29/518 ,  H10B12/0335 ,  H10B12/315 ,  H10B12/482 ,  H10B12/488

Abstract: A semiconductor device may include a bit line on the substrate, a channel pattern on the bit line and extending in a direction perpendicular to the bit line, a word line intersecting the bit line and spaced apart from the channel pattern, a gate insulating pattern between the channel pattern and the word line, an insulating pattern on the word line, and a landing pad connected to the channel pattern. The gate insulating pattern may include a first gate insulating pattern and a second gate insulating pattern having a first dielectric constant and a second dielectric constant, respectively. The second gate insulating pattern may be between the first gate insulating pattern and the word line. The first and second dielectric constants may be different. A first width of the first gate insulating pattern may be different from a second width of the second gate insulating pattern.