公开(公告)号：US20140036150A1

公开(公告)日：2014-02-06

申请号：US13959067

申请日：2013-08-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sung Jin KIM ,  Tae Ik KIM ,  Se Hyung JEON

IPC: H03B21/02 ,  H04N5/04

CPC classification number: H03B21/025 ,  H04N5/04 ,  H04N5/123

Abstract: A method of operating a pixel clock generator (PCG), the method including generating N clock signals according to a control voltage signal, the N clock signals having different phases and N being a natural number; generating M frequency-divided clock signals based on the N clock signals, the M frequency-divided clock signals having different phases and M being a natural number greater than N; and generating a pixel clock signal based on at least two selected ones of the M frequency-divided clock signals.

Abstract translation: 一种操作像素时钟发生器（PCG）的方法，该方法包括根据控制电压信号产生N个时钟信号，N个时钟信号具有不同的相位，N是自然数; 基于N个时钟信号产生M个分频时钟信号，具有不同相位的M个分频时钟信号，M是大于N的自然数; 以及基于所述M个分频时钟信号中的至少两个所选择的时钟信号产生像素时钟信号。