公开(公告)号：US11700722B2

公开(公告)日：2023-07-11

申请号：US17520868

申请日：2021-11-08

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jaewha Park ,  Moonkeun Kim ,  Sukhoon Kim ,  Dongchan Lim

IPC: H10B12/00

CPC classification number: H10B12/053 ,  H10B12/315 ,  H10B12/34 ,  H10B12/482

Abstract: A semiconductor device manufacturing method according to the exemplary embodiments of the disclosure includes patterning a substrate, thereby forming an active pattern, forming a trench penetrating the active pattern, forming a support layer covering the trench, forming a first opening at the support layer, forming a gate electrode layer filling the trench through the first opening, and forming a bit line structure electrically connected to the active pattern. The support layer includes a base portion covering a top surface of the active pattern, and a support disposed in the trench.

公开(公告)号：US12101923B2

公开(公告)日：2024-09-24

申请号：US18207689

申请日：2023-06-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jaewha Park ,  Moonkeun Kim ,  Sukhoon Kim ,  Dongchan Lim

IPC: H10B12/00

CPC classification number: H10B12/053 ,  H10B12/315 ,  H10B12/34 ,  H10B12/482

Abstract: A semiconductor device manufacturing method according to the exemplary embodiments of the disclosure includes patterning a substrate, thereby forming an active pattern, forming a trench penetrating the active pattern, forming a support layer covering the trench, forming a first opening at the support layer, forming a gate electrode layer filling the trench through the first opening, and forming a bit line structure electrically connected to the active pattern. The support layer includes a base portion covering a top surface of the active pattern, and a support disposed in the trench.