公开(公告)号：US20250159871A1

公开(公告)日：2025-05-15

申请号：US18664850

申请日：2024-05-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Young Jun KIM ,  Ga Eun CHOI ,  Ji Hoon SUNG ,  Kyu Hyun CHA

IPC: H10B12/00

Abstract: A semiconductor memory device may include a substrate including a cell region, a peripheral region, and a boundary region therebetween, a plurality of gate electrodes extending in a first direction within the substrate of the cell region, a plurality of bit lines extending in a second direction crossing the first direction on the substrate of the cell region and the boundary region, a plurality of buried contacts connected to the substrate of the cell region and between the gate electrodes and between the bit lines on the substrate of the cell region, a dummy buried contact between the bit lines on the substrate of the boundary region, and a bit line contact connected to at least one of the bit lines on the substrate of the boundary region, wherein the dummy buried contact includes an insulating material.