公开(公告)号：US20240014177A1

公开(公告)日：2024-01-11

申请号：US18217701

申请日：2023-07-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Young Kun JEE ,  Un-Byoung KANG ,  Jum Yong PARK ,  Jong-Hyeon CHANG

IPC: H01L25/065 ,  H01L21/768 ,  H01L23/00 ,  H01L23/48

CPC classification number: H01L25/0657 ,  H01L21/76898 ,  H01L24/16 ,  H01L23/481 ,  H01L24/19 ,  H01L2225/06544 ,  H01L2224/20 ,  H01L2224/16145 ,  H01L2924/15311

Abstract: A semiconductor package includes a redistribution substrate. A first semiconductor chip is disposed on the redistribution substrate. The first semiconductor chip includes a first semiconductor substrate, first through vias penetrating through the first semiconductor substrate, and a first bonding layer disposed on the first semiconductor substrate. The first bonding layer is electrically connected to the first through vias. A second semiconductor chip includes a second semiconductor substrate and a second bonding layer disposed on the second semiconductor substrate. The second bonding layer is bonded to the first bonding layer. A filling insulating film is disposed on the redistribution substrate. The filling insulating film covers the first semiconductor chip and the second semiconductor chip. An upper surface of the filling insulating film is disposed on a level above an upper surface of the first semiconductor chip and an upper surface of the second semiconductor chip.

公开(公告)号：US20230021152A1

公开(公告)日：2023-01-19

申请号：US17665652

申请日：2022-02-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyun Su HWANG ,  Jun Yun KWEON ,  Jum Yong PARK ,  Sol Ji SONG ,  Dong Joon OH ,  Chung Sun LEE

IPC: H01L23/00

Abstract: A semiconductor device includes an insulating layer on a substrate; a via extending from within the substrate and extending through one face of the substrate and a bottom face of a trench defined in the insulating layer such that a portion of a sidewall and a top face of the via are exposed through the substrate; and a pad contacting the exposed portion of the sidewall and the top face of the via. The pad fills the trench. The insulating layer includes a passivation layer on the substrate, and a protective layer is on the passivation layer. An etch stop layer is absent between the passivation layer and the protective layer. A vertical level of a bottom face of the trench is higher than a vertical level of one face of the substrate and is lower than a vertical level of a top face of the passivation layer.