公开(公告)号：US20220383103A1

公开(公告)日：2022-12-01

申请号：US17499149

申请日：2021-10-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Junki PARK ,  Joonsang YU ,  Jun-Woo JANG

IPC: G06N3/08 ,  G06N3/04 ,  G06F7/556 ,  G06F7/487 ,  H03K19/17728

Abstract: A processor-implemented hardware accelerator method includes: receiving input data; loading a lookup table (LUT); determining an address of the LUT by inputting the input data to a comparator; obtaining a value of the LUT corresponding to the input data based on the address; and determining a value of a nonlinear function corresponding to the input data based on the value of the LUT, wherein the LUT is determined based on a weight of a neural network that outputs the value of the nonlinear function.

公开(公告)号：US20200065659A1

公开(公告)日：2020-02-27

申请号：US16550498

申请日：2019-08-26

Applicant: Samsung Electronics Co., Ltd ,  Seoul National University R&DB Foundation

Inventor： Seungwon LEE ,  Hanmin PARK ,  Gunhee LEE ,  Namhyung KIM ,  Joonsang YU ,  Kiyoung CHOI

IPC: G06N3/063 ,  G06N3/08 ,  G06N3/04

Abstract: A method of accelerating a training process of a neural network includes acquiring activations used in the training process and a bit-vector corresponding to the activations, selecting activations requiring an operation from among the acquired activations by using the bit-vector, and performing backward propagation using the selected activations and filters corresponding to the selected activations.