公开(公告)号：US20240145326A1

公开(公告)日：2024-05-02

申请号：US18323680

申请日：2023-05-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seungchul OH ,  Junwoo MYUNG ,  Jangbae SON ,  Gun LEE

IPC: H01L23/31 ,  H01L21/56 ,  H01L23/498

CPC classification number: H01L23/3128 ,  H01L21/568 ,  H01L23/49822 ,  H01L24/16 ,  H01L2224/16227

Abstract: A method of manufacturing a semiconductor package includes adding an insulating frame to a surface of a carrier substrate, wherein the insulating frame covers a side surface of a first metal layer on the surface of the carrier substrate and bringing a cover insulating layer into contact with the insulating frame and the first metal layer, wherein the cover insulating layer covers at least one semiconductor chip.

公开(公告)号：US20230057039A1

公开(公告)日：2023-02-23

申请号：US17722689

申请日：2022-04-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： Myeongho HONG ,  Dowon KIM ,  Jangbae SON ,  Seokwoo YOON ,  Kyomuk LIM

IPC: H01L23/538 ,  H01L23/498 ,  H01L23/31 ,  H01L21/56 ,  H01L21/48 ,  H01L23/00

Abstract: A package structure includes a core substrate including a substrate base including a plurality of first cavities and a plurality of second cavities, a plurality of blocks in the plurality of second cavities; and a plurality of bridge structures that extend between each of the plurality of blocks and the substrate base, a plurality of semiconductor chips in the plurality of first cavities, and a molding layer configured to cover the core substrate and the plurality of semiconductor chips, a portion of the molding layer being in the plurality of first cavities and the plurality of second cavities.