公开(公告)号：US20220206893A1

公开(公告)日：2022-06-30

申请号：US17466392

申请日：2021-09-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jae-Kun LEE ,  Jea-Young KWON ,  Hwan KIM ,  Song Ho YOON ,  Sil Wan CHANG

IPC: G06F11/10 ,  G06F11/07 ,  G06F3/06

Abstract: A storage system may include a memory device including a first region including a single-level cell and a second region different from the first region, and a storage controller configured to read data from the first region at a first gear level of a plurality of gear levels, determine an error level of the read data and a state of the memory device, and change the first gear level to a second gear level of the plurality of gear levels based on the determined error level of the data and the determined state of the memory device.

公开(公告)号：US20220164123A1

公开(公告)日：2022-05-26

申请号：US17377901

申请日：2021-07-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hwan KIM ,  Jea-Young KWON ,  Jae-Kun LEE ,  Song Ho YOON ,  Sil Wan CHANG

IPC: G06F3/06 ,  G06F11/10 ,  G11C11/56 ,  G11C16/26 ,  G11C16/10

Abstract: A storage device may include, at least one memory device including at least a first single-level cell (SLC) region, a second SLC region, and at least one multi-level cell (MLC) region, the first SLC region having a higher data read speed than the second SLC region, and the second SLC region having a higher data read speed than the at least one MLC region, and a storage controller configured to control the migration of data among the first SLC region, the second SLC region, and the at least one MLC region.

公开(公告)号：US20220066872A1

公开(公告)日：2022-03-03

申请号：US17352861

申请日：2021-06-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jea-Young KWON ,  Young-Jin PARK ,  Jae-Kun LEE ,  Song Ho YOON ,  Sil Wan CHANG

IPC: G06F11/10 ,  G06F11/07 ,  G06F11/14 ,  G06F3/06

Abstract: A storage device is provided. The storage device includes a memory device including a memory cell array configured to store metadata and main data and a storage controller configured to access the memory device and control the memory device, wherein the storage controller is configured to read data from the memory device at a speed adaptively varying to a first read speed or a second read speed according to a state of the memory device, the second read speed being faster than the first read speed.