公开(公告)号：US08949680B2

公开(公告)日：2015-02-03

申请号：US13755576

申请日：2013-01-31

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyun Su Chae ,  Jong Shin Shin

IPC: G01R31/28 ,  G06F11/00 ,  G01R31/3177 ,  G01R31/317

CPC classification number: G01R31/3177 ,  G01R31/31715

Abstract: A data receiver device includes a logic unit configured to generate a test pattern signal, receive a test result signal in the test mode, and compare the test pattern signal with the test result signal to perform a test in the test mode. The data receiver further includes a system frequency control circuit configured to multiply a reference clock signal by a multiplication factor received from the logic unit and to output a test clock signal, an output terminal configured to serialize the test pattern signal based on the test clock signal and to output an output signal, and an input terminal configured to recover a data signal and a data clock signal from an input signal based on the output signal, to deserialize the data signal based on the data clock signal, and to output the test result signal to the logic unit.

Abstract translation: 一种数据接收装置包括：一个逻辑单元，被配置为产生测试模式信号，在测试模式下接收测试结果信号，并将测试模式信号与测试结果信号进行比较，以便在测试模式下进行测试。 数据接收机还包括系统频率控制电路，其被配置为将参考时钟信号乘以从逻辑单元接收的乘法因子并输出测试时钟信号，输出端子被配置为基于测试时钟信号串行化测试模式信号 并且输出输出信号，以及输入端子，被配置为基于输出信号从输入信号恢复数据信号和数据时钟信号，以基于数据时钟信号反序列化数据信号，并输出测试结果 信号到逻辑单元。