公开(公告)号：US20140089577A1

公开(公告)日：2014-03-27

申请号：US14031897

申请日：2013-09-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jae-Woong LEE ,  Hyong-Ryol HWANG

IPC: G11C11/406

CPC classification number: G11C11/40615

Abstract: A volatile memory device includes a memory cell array, a command decoder, a self-refresh circuit, and a register. The command decoder is configured to decode a self-refresh entry command, a self-refresh exit command, and a register read command based on external command signals received from outside the volatile memory device. The self-refresh circuit is configured to automatically refresh the memory cell array during a self-refresh mode which be entered in response to the self-refresh entry command and be exited in response to the self-refresh exit command. The register is configured to store an accessible state in response to the self-refresh exit command, and output the stored accessible state in response to the register read command. The accessible state indicates whether or not the memory cell array is ready to be read or written.

Abstract translation: 易失性存储器件包括存储单元阵列，命令解码器，自刷新电路和寄存器。 命令解码器被配置为基于从易失性存储器设备外部接收的外部命令信号来解码自刷新输入命令，自刷新退出命令和寄存器读取命令。 自刷新电路被配置为在自刷新模式期间自动刷新存储单元阵列，该自刷新模式响应于自刷新输入命令被输入，并且响应于自刷新退出命令被退出。 寄存器被配置为响应于自刷新退出命令来存储可访问状态，并且响应于寄存器读取命令输出存储的可访问状态。 可访问状态指示存储单元阵列是否准备好被读取或写入。